Zizhang Luo

517 total citations
12 papers, 363 citations indexed

About

Zizhang Luo is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, Zizhang Luo has authored 12 papers receiving a total of 363 indexed citations (citations by other indexed papers that have themselves been cited), including 10 papers in Hardware and Architecture, 4 papers in Electrical and Electronic Engineering and 3 papers in Computer Networks and Communications. Recurrent topics in Zizhang Luo's work include Parallel Computing and Optimization Techniques (10 papers), Embedded Systems Design Techniques (6 papers) and Advanced Data Storage Technologies (3 papers). Zizhang Luo is often cited by papers focused on Parallel Computing and Optimization Techniques (10 papers), Embedded Systems Design Techniques (6 papers) and Advanced Data Storage Technologies (3 papers). Zizhang Luo collaborates with scholars based in China, United States and Germany. Zizhang Luo's co-authors include Huiling Duan, Zhuping Huang, Yun Liang, Liqiang Lu, Peng Li, Tao Wang, Hangrui Bi, Jieming Yin, Yuyue Wang and Jason Cong and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Mechanics of Materials.

In The Last Decade

Zizhang Luo

9 papers receiving 357 citations

Peers

Zizhang Luo

MM

HA

EEE

MC

CVPR

Dustin Richmond United States

Youngjoon Kim South Korea

Abhishek Das United States

Tao Sheng China

Yi-Sheng Su Taiwan

Hengliang Zhu China

Trang Hoang Vietnam

Rajesh Garg United States

Yanghong Tan China

Dustin Richmond United States

Zizhang Luo

12 ×0.1

MM

115 ×1.0

HA

101 ×1.0

EEE

18 ×0.2

MC

35 ×0.5

CVPR

Citations per year, relative to Zizhang Luo Zizhang Luo (= 1×) peers Dustin Richmond

Countries citing papers authored by Zizhang Luo

Since Specialization

Citations

This map shows the geographic impact of Zizhang Luo's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Zizhang Luo with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Zizhang Luo more than expected).

Fields of papers citing papers by Zizhang Luo

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Zizhang Luo. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Zizhang Luo. The network helps show where Zizhang Luo may publish in the future.

Co-authorship network of co-authors of Zizhang Luo

This figure shows the co-authorship network connecting the top 25 collaborators of Zizhang Luo. A scholar is included among the top collaborators of Zizhang Luo based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Zizhang Luo. Zizhang Luo is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

12 of 12 papers shown

1.

Zou, Yawen, et al.. (2025). Clay: High-level ASIP Framework for Flexible Microarchitecture-Aware Instruction Customization. 1–9.

2.

Cui, Fan, et al.. (2025). Cayman: Custom Accelerator Generation with Control Flow and Data Access Optimization. 1–7.

3.

Luo, Zizhang, et al.. (2024). Cement: Streamlining FPGA Hardware Design with Cycle-Deterministic eHDL and Synthesis. 211–222. 3 indexed citations

4.

Luo, Zizhang, Liqiang Lu, Size Zheng, et al.. (2023). Rubick: A Synthesis Framework for Spatial Architectures via Dataflow Decomposition. 1–6. 6 indexed citations

5.

Luo, Zizhang, et al.. (2023). Calabash: Accelerating Attention Using a Systolic Array Chain on FPGAs. 242–247. 3 indexed citations

6.

Lu, Liqiang, Zizhang Luo, Size Zheng, et al.. (2023). Rubick: A Unified Infrastructure for Analyzing, Exploring, and Implementing Spatial Architectures via Dataflow Decomposition. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 43(4). 1177–1190.

7.

Luo, Zizhang, et al.. (2022). Automatic Generation of Spatial Accelerator for Tensor Algebra. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 42(6). 1898–1911. 3 indexed citations

8.

Lu, Liqiang, Yuyue Wang, Zizhang Luo, et al.. (2021). TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation. 720–733. 52 indexed citations

9.

Lu, Liqiang, Hangrui Bi, Zizhang Luo, et al.. (2021). Sanger: A Co-Design Framework for Enabling Sparse Attention using Reconfigurable Architecture. 977–991. 116 indexed citations

10.

Luo, Zizhang, et al.. (2021). Analyzing the Design Space of Spatial Tensor Accelerators on FPGAs. 230–235. 1 indexed citations

11.

Luo, Zizhang, et al.. (2021). TensorLib: A Spatial Accelerator Generation Framework for Tensor Algebra. 865–870. 32 indexed citations

12.

Duan, Huiling, et al.. (2004). Stress concentration tensors of inhomogeneities with interface effects. Mechanics of Materials. 37(7). 723–736. 147 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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