Yen-Kai Lin

1.0k total citations
37 papers, 786 citations indexed

About

Yen-Kai Lin is a scholar working on Electrical and Electronic Engineering, Materials Chemistry and Atomic and Molecular Physics, and Optics. According to data from OpenAlex, Yen-Kai Lin has authored 37 papers receiving a total of 786 indexed citations (citations by other indexed papers that have themselves been cited), including 37 papers in Electrical and Electronic Engineering, 8 papers in Materials Chemistry and 3 papers in Atomic and Molecular Physics, and Optics. Recurrent topics in Yen-Kai Lin's work include Semiconductor materials and devices (36 papers), Ferroelectric and Negative Capacitance Devices (20 papers) and Advancements in Semiconductor Devices and Circuit Design (17 papers). Yen-Kai Lin is often cited by papers focused on Semiconductor materials and devices (36 papers), Ferroelectric and Negative Capacitance Devices (20 papers) and Advancements in Semiconductor Devices and Circuit Design (17 papers). Yen-Kai Lin collaborates with scholars based in United States, India and Taiwan. Yen-Kai Lin's co-authors include Chenming Hu, Sayeef Salahuddin, Harshit Agarwal, Pragya Kushwaha, Ming-Yen Kao, Juan Pablo Duarte, Yu-Hung Liao, H. L. Chang, Angada B. Sachid and Jenn‐Gwo Hwu and has published in prestigious journals such as IEEE Transactions on Electron Devices, Japanese Journal of Applied Physics and IEEE Electron Device Letters.

In The Last Decade

Yen-Kai Lin

36 papers receiving 760 citations

Peers

Yen-Kai Lin
Jaesung Jo South Korea
Ava J. Tan United States
Jesús Calvo Germany
B. Pätzold Germany
K.-S. Li Taiwan
Yen-Kai Lin
Citations per year, relative to Yen-Kai Lin Yen-Kai Lin (= 1×) peers Roman Boschke

Countries citing papers authored by Yen-Kai Lin

Since Specialization
Citations

This map shows the geographic impact of Yen-Kai Lin's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yen-Kai Lin with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yen-Kai Lin more than expected).

Fields of papers citing papers by Yen-Kai Lin

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yen-Kai Lin. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yen-Kai Lin. The network helps show where Yen-Kai Lin may publish in the future.

Co-authorship network of co-authors of Yen-Kai Lin

This figure shows the co-authorship network connecting the top 25 collaborators of Yen-Kai Lin. A scholar is included among the top collaborators of Yen-Kai Lin based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yen-Kai Lin. Yen-Kai Lin is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Hu, Vita Pi‐Ho, et al.. (2020). Optimization of Negative-Capacitance Vertical-Tunnel FET (NCVT-FET). IEEE Transactions on Electron Devices. 67(6). 2593–2599. 63 indexed citations
2.
Rajaei, Ramin, Yen-Kai Lin, Sayeef Salahuddin, Michael Niemier, & Xiaobo Sharon Hu. (2020). GC-eDRAM design using hybrid FinFET/NC-FinFET. 199–204. 2 indexed citations
3.
Rajaei, Ramin, Yen-Kai Lin, Sayeef Salahuddin, Michael Niemier, & Xiaobo Sharon Hu. (2020). Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs. 96. 1–5. 1 indexed citations
4.
Lin, Yen-Kai. (2019). Compact Modeling of Advanced CMOS and Emerging Devices for Circuit Simulation. eScholarship (California Digital Library).
5.
Kushwaha, Pragya, Harshit Agarwal, Varun Mishra, et al.. (2019). Modeling the Quantum Gate capacitance of Nano-Sheet Gate-All-Around MOSFET. 1–3. 4 indexed citations
6.
Kushwaha, Pragya, Yen-Kai Lin, Avirup Dasgupta, et al.. (2019). Characterization and Modeling of Flicker Noise in FinFETs at Advanced Technology Node. IEEE Electron Device Letters. 40(6). 985–988. 34 indexed citations
7.
Kwon, Daewoong, Suraj Cheema, Yen-Kai Lin, et al.. (2019). Near Threshold Capacitance Matching in a Negative Capacitance FET With 1 nm Effective Oxide Thickness Gate Stack. IEEE Electron Device Letters. 41(1). 179–182. 28 indexed citations
8.
Lin, Yen-Kai, Pragya Kushwaha, Juan Pablo Duarte, et al.. (2018). New Mobility Model for Accurate Modeling of Transconductance in FDSOI MOSFETs. IEEE Transactions on Electron Devices. 65(2). 463–469. 3 indexed citations
9.
Kao, Ming-Yen, Angada B. Sachid, Yen-Kai Lin, et al.. (2018). Variation Caused by Spatial Distribution of Dielectric and Ferroelectric Grains in a Negative Capacitance Field-Effect Transistor. IEEE Transactions on Electron Devices. 65(10). 4652–4658. 30 indexed citations
10.
Agarwal, Harshit, Pragya Kushwaha, Juan Pablo Duarte, et al.. (2018). Designing 0.5 V 5-nm HP and 0.23 V 5-nm LP NC-FinFETs With Improved ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ Sensitivity in Presence of Parasitic Capacitance. IEEE Transactions on Electron Devices. 65(3). 1211–1216. 25 indexed citations
11.
Agarwal, Harshit, Pragya Kushwaha, Yen-Kai Lin, et al.. (2018). NCFET Design Considering Maximum Interface Electric Field. IEEE Electron Device Letters. 39(8). 1254–1257. 30 indexed citations
12.
Lin, Yen-Kai, Ming-Yen Kao, Harshit Agarwal, et al.. (2018). Effect of Polycrystallinity and Presence of Dielectric Phases on NC-FinFET Variability. 9.4.1–9.4.4. 17 indexed citations
13.
Agarwal, Harshit, Pragya Kushwaha, Juan Pablo Duarte, et al.. (2018). Engineering Negative Differential Resistance in NCFETs for Analog Applications. IEEE Transactions on Electron Devices. 65(5). 2033–2039. 80 indexed citations
14.
Kushwaha, Pragya, Harshit Agarwal, Yen-Kai Lin, et al.. (2018). Modeling of Advanced RF Bulk FinFETs. IEEE Electron Device Letters. 39(6). 791–794. 16 indexed citations
15.
Lin, Yen-Kai, Juan Pablo Duarte, Pragya Kushwaha, et al.. (2017). Compact Modeling Source-to-Drain Tunneling in Sub-10-nm GAA FinFET With Industry Standard Model. IEEE Transactions on Electron Devices. 64(9). 3576–3581. 16 indexed citations
16.
Lin, Yen-Kai, Pragya Kushwaha, Harshit Agarwal, et al.. (2017). Modeling of Back-Gate Effects on Gate-Induced Drain Leakage and Gate Currents in UTB SOI MOSFETs. IEEE Transactions on Electron Devices. 64(10). 3986–3990. 8 indexed citations
17.
Lin, Yen-Kai, Sourabh Khandelwal, Juan Pablo Duarte, et al.. (2016). A Predictive Tunnel FET Compact Model With Atomistic Simulation Validation. IEEE Transactions on Electron Devices. 64(2). 599–605. 17 indexed citations
18.
Lin, Yen-Kai, et al.. (2015). Non-Uniform Hole Current Induced Negative Capacitance Phenomenon Examined by Photo-Illumination in MOS(n). ECS Transactions. 69(5). 261–265. 2 indexed citations
19.
Lin, Yen-Kai & Jenn‐Gwo Hwu. (2014). Role of Lateral Diffusion Current in Perimeter-Dependent Current of MOS(p) Tunneling Temperature Sensors. IEEE Transactions on Electron Devices. 61(10). 3562–3565. 13 indexed citations
20.
Lin, Yen-Kai & Jenn‐Gwo Hwu. (2014). Photosensing by Edge Schottky Barrier Height Modulation Induced by Lateral Diffusion Current in MOS(p) Photodiode. IEEE Transactions on Electron Devices. 61(9). 3217–3222. 26 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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