Yean-Yow Hwang

432 total citations
13 papers, 304 citations indexed

About

Yean-Yow Hwang is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computational Theory and Mathematics. According to data from OpenAlex, Yean-Yow Hwang has authored 13 papers receiving a total of 304 indexed citations (citations by other indexed papers that have themselves been cited), including 11 papers in Hardware and Architecture, 8 papers in Electrical and Electronic Engineering and 4 papers in Computational Theory and Mathematics. Recurrent topics in Yean-Yow Hwang's work include VLSI and Analog Circuit Testing (10 papers), VLSI and FPGA Design Techniques (7 papers) and Embedded Systems Design Techniques (5 papers). Yean-Yow Hwang is often cited by papers focused on VLSI and Analog Circuit Testing (10 papers), VLSI and FPGA Design Techniques (7 papers) and Embedded Systems Design Techniques (5 papers). Yean-Yow Hwang collaborates with scholars based in United States. Yean-Yow Hwang's co-authors include Jason Cong, J. Cong, Darko Kirovski, Miodrag Potkonjak and Jason Cong and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and ACM Transactions on Design Automation of Electronic Systems.

In The Last Decade

Yean-Yow Hwang

12 papers receiving 269 citations

Peers

Countries citing papers authored by Yean-Yow Hwang

Since Specialization

Citations

This map shows the geographic impact of Yean-Yow Hwang's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yean-Yow Hwang with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yean-Yow Hwang more than expected).

Fields of papers citing papers by Yean-Yow Hwang

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yean-Yow Hwang. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yean-Yow Hwang. The network helps show where Yean-Yow Hwang may publish in the future.

Co-authorship network of co-authors of Yean-Yow Hwang

This figure shows the co-authorship network connecting the top 25 collaborators of Yean-Yow Hwang. A scholar is included among the top collaborators of Yean-Yow Hwang based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yean-Yow Hwang. Yean-Yow Hwang is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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13 of 13 papers shown

#	Work	Indexed citations
1	Protecting Combinational Logic Synthesis Solutions 2006 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Darko Kirovski, Yean-Yow Hwang, Miodrag Potkonjak, Jason Cong	29
2	Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA design 2005 ·Jason Cong, Yean-Yow Hwang	1
3	Intellectual property protection by watermarking combinational logic synthesis solutions 2002 ·(unknown), Yean-Yow Hwang, (unknown), (unknown)	3
4	Boolean matching for LUT-based logic blocks with applications to architecture evaluation and technology mapping 2001 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·J. Cong, Yean-Yow Hwang	50
5	Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA designs 2000 ·ACM Transactions on Design Automation of Electronic Systems ·Jason Cong, Yean-Yow Hwang	13
6	Technology mapping for FPGAs with nonuniform pin delays and fast interconnections 1999 ·Jason Cong, Yean-Yow Hwang, (unknown)	4
7	Logic synthesis for lookup-table based field-programmable gate arrays 1999 ·Yean-Yow Hwang, Jason Cong	1
8	Intellectual property protection by watermarking combinational logic synthesis solutions 1998 ·Darko Kirovski, Yean-Yow Hwang, Miodrag Potkonjak, Jason Cong	61
9	Boolean matching for complex PLBs in LUT-based FPGAs with application to architecture evaluation 1998 ·Jason Cong, Yean-Yow Hwang	17
10	Partially-dependent functional decomposition with applications in FPGA synthesis and mapping 1997 ·Jason Cong, Yean-Yow Hwang	10
11	Structural gate decomposition for depth-optimal technology mapping in LUT-based FPGA design 1996 ·Jason Cong, Yean-Yow Hwang	18
12	Simultaneous depth and area minimization in LUT-based FPGA mapping 1995 ·Jason Cong, Yean-Yow Hwang	63
13	Simultaneous Depth and Area Minimization in LUT-based FPGA Mapping 1995 ·Jason Cong, Yean-Yow Hwang	34

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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