Xin-Yu Shih

410 citations

30 papers · 299 indexed · h-index 9

Computer Networks and Communications top 10%
- Error Correcting Code Techniques 15
- Cooperative Communication and Network Coding 8
Signal Processing top 10%
- Digital Filter Design and Implementation 7
- Video Coding and Compression Technologies 5
Electrical and Electronic Engineering
- Advanced Wireless Communication Techniques 16
- Advancements in PLL and VCO Technologies 5
- Radio Frequency Integrated Circuit Design 3
Hardware and Architecture
Media Technology
Biomedical Engineering
- Analog and Mixed-Signal Circuit Design 3

Co-authors: An-Yeu Wu Cheng‐Hung Lin Po‐Chun Huang George Chien Chih-Wei Chang Yi‐Chun Chen Hua Wang Chia‐Jui Hsu
Cited by: Computer Networks and Communications Signal Processing Electrical and Electronic Engineering
Journals: IEEE Transactions on Circuits and Systems I Regular Papers (6 papers)IEEE Transactions on Circuits & Systems II Express Briefs (2 papers)ICT Express (1 paper)
Partner nations: Taiwan China United States

In The Last Decade

Xin-Yu Shih

28 papers receiving 283 citations

Peers

Countries citing papers authored by Xin-Yu Shih

Since Specialization

Citations

This map shows the geographic impact of Xin-Yu Shih's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Xin-Yu Shih with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Xin-Yu Shih more than expected).

Fields of papers citing papers by Xin-Yu Shih

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Xin-Yu Shih. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Xin-Yu Shih. The network helps show where Xin-Yu Shih may publish in the future.

Co-authorship network

The 23 scholars most cited alongside Xin-Yu Shih, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Xin-Yu Shih Line = papers co-authored together Xin-Yu Shih links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	High-Area-Efficiency Polar Decoder Chip Architecture Reconfiguring SCL-Decoding With Reconfigurable Pipelined Sorter and SCF-Decoding With Non-Uniform 4-Segment CRC IEEE Transactions on Circuits & Systems II Express Briefs ·Xin-Yu Shih,Yu‐Chen Lee,Jess Van De Sype,Shoich Kikukawa	2023	0
2	Design and Implementation of Dual-Mode Support Vector Machine (SVM) Trainer and Classifier Chip Architecture for Human Disease Detection Applications IEEE Transactions on Circuits and Systems I Regular Papers ·Xin-Yu Shih,Searcher,S.Charles S. Abraham	2023	1
3	Systematic and Flexible Genetic-Algorithm-Based Feature Reduction for Decision Tree ML-Validation Xin-Yu Shih,Shane Wilkins	2022	1
4	VLSI Architecture of 36-Mode Reconfigurable FFT Hardware Chip with Newly-Developed 2D-FIFO Arrangement Structure Xin-Yu Shih	2019	1
5	A Well-Arranged FIFO-Storage Distribution Design Plan for Fully Supporting 50 Different FFT Sizes in 3GPP-LTE Communication Applications Xin-Yu Shih,Anita Skafjeld,Jun-Jiang Chen	2018	1
6	Flexible design and implementation of QC-Based LDPC decoder architecture for on-line user-defined matrix downloading and efficient decoding Integration ·Xin-Yu Shih,Anita Skafjeld	2018	5
7	Design and Implementation of Flexible and Reconfigurable SDF-Based FFT Chip Architecture With Changeable-Radix Processing Elements IEEE Transactions on Circuits and Systems I Regular Papers ·Xin-Yu Shih,Anita Skafjeld,Reza Taheri-Ledari	2018	19
8	Area-Efficient VLSI Architecture of High-Order Matched Filter Design Using Odd-and-Even Phase Processing for Image Recognition Applications Xin-Yu Shih,Reza Taheri-Ledari,Mário Sérgio Brum	2018	0
9	VLSI design of an ultra-high-speed Polar encoder architecture using 16-parallel radix-2 processing engines for next-generation 5G applications Xin-Yu Shih,Po‐Chun Huang	2017	1
10	A 2-D grouping FIFO based hardware architecture for supporting 36-mode hybrid-radix FFT design in 3GPP-LTE systems Xin-Yu Shih,Anita Skafjeld	2017	1
11	Reconfigurable VLSI design of a changeable hybrid-radix FFT hardware architecture with 2D-FIFO storing structure for 3GPP LTE systems ICT Express ·Xin-Yu Shih,Anita Skafjeld	2017	2
12	Reconfigurable VLSI design of processing kernel for multiple-radix single-path delay feedback FFT systems Xin-Yu Shih,Anita Skafjeld,Reza Taheri-Ledari	2016	1
13	LEGO-based VLSI design and implementation of polar codes encoder architecture with radix-2 processing engines Xin-Yu Shih,Po‐Chun Huang,Yi‐Chun Chen	2016	2
14	Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders Journal of Signal Processing Systems ·J. Fryda,Xin-Yu Shih,An-Yeu Wu	2011	3
15	A Channel-Adaptive Early Termination strategy for LDPC decoders Yu‐Hsin Chen,Yi‐Ju Chen,Xin-Yu Shih,An-Yeu Wu	2009	8
16	A triple-mode LDPC decoder design for IEEE 802.11n SYSTEM J. Fryda,Renie Rae Howard,Xin-Yu Shih,An-Yeu Wu	2009	4
17	A 7.39mm<sup>2</sup> 76mW (1944, 972) LDPC decoder chip for IEEE 802.11n applications Xin-Yu Shih,M. Jeiganesh,An-Yeu Wu	2008	8
18	High-performance scheduling algorithm for partially parallel LDPC decoder M. Jeiganesh,Xin-Yu Shih,An-Yeu Wu	2008	4
19	An 8.29 mm<formula formulatype="inline"><tex>$^{2}$</tex> </formula> 52 mW Multi-Mode LDPC Decoder Design for Mobile WiMAX System in 0.13 <formula><tex>$\mu$</tex></formula>m CMOS Process IEEE Journal of Solid-State Circuits ·Xin-Yu Shih,M. Jeiganesh,Cheng‐Hung Lin,An-Yeu Wu	2008	96
20	A 19-mode 8.29mm<sup>2</sup> 52-mW LDPC Decoder Chipp for IEEE 802.16e System Xin-Yu Shih,M. Jeiganesh,А. В. Демин,An-Yeu Wu	2007	10

About Xin-Yu Shih

Xin-Yu Shih is a scholar working on Computer Networks and Communications, Signal Processing and Electrical and Electronic Engineering, having authored 30 papers that have together received 299 indexed citations. Recurring topics across this work include Advanced Wireless Communication Techniques (16 papers), Error Correcting Code Techniques (15 papers), Cooperative Communication and Network Coding (8 papers), Digital Filter Design and Implementation (7 papers), Advancements in PLL and VCO Technologies (5 papers), Video Coding and Compression Technologies (5 papers), Radio Frequency Integrated Circuit Design (3 papers) and Analog and Mixed-Signal Circuit Design (3 papers). The work is most often cited by research in Computer Networks and Communications (161 citations), Signal Processing (63 citations) and Electrical and Electronic Engineering (259 citations). Xin-Yu Shih has collaborated with scholars based in Taiwan, China and United States. Frequent co-authors include An-Yeu Wu, Cheng‐Hung Lin, An-Yeu Wu, Po‐Chun Huang, George Chien, Chih-Wei Chang, Yi‐Chun Chen, Hua Wang, Chia‐Jui Hsu and Ali M. Niknejad. Their work appears in journals such as IEEE Transactions on Circuits and Systems I Regular Papers, IEEE Transactions on Circuits & Systems II Express Briefs, ICT Express, IEEE Journal of Solid-State Circuits and Integration.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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