Thomas D. Burd
- Electrical and Electronic Engineering top 10%
- Computer Networks and Communications top 2%
- Hardware and Architecture top 1%
- Artificial Intelligence top 10%
- Information Systems top 10%
- Co-authors
- R.W. BrodersenTrevor PeringSamuel NaffzigerSean WhiteGabriel H. LohKevin M. LepakAlan SmithVishak Venkatraman
- Topics
- Parallel Computing and Optimization Techniques (6 papers)Low-power high-performance VLSI design (5 papers)Embedded Systems Design Techniques (4 papers)
- Cited by
- Hardware and ArchitectureComputer Networks and CommunicationsElectrical and Electronic Engineering
- Journals
- IEEE Journal of Solid-State CircuitsThe Journal of VLSI Signal Processing Systems for Signal Image and Video Technology
- Partner nations
- United StatesCanada
In The Last Decade
Thomas D. Burd
8 papers receiving 1.0k citations
Hit Papers
Peers
Comparison fields: 5 of 45
- Electrical and Electronic Engineering 616
- Computer Networks and Communications 520
- Hardware and Architecture 482
- Artificial Intelligence 106
- Information Systems 88
Countries citing papers authored by Thomas D. Burd
This map shows the geographic impact of Thomas D. Burd's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Thomas D. Burd with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Thomas D. Burd more than expected).
Fields of papers citing papers by Thomas D. Burd
This network shows the impact of papers produced by Thomas D. Burd. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Thomas D. Burd. The network helps show where Thomas D. Burd may publish in the future.
Co-authorship network of co-authors of Thomas D. Burd
This figure shows the co-authorship network connecting the top 25 collaborators of Thomas D. Burd. A scholar is included among the top collaborators of Thomas D. Burd based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Thomas D. Burd. Thomas D. Burd is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 111 | |
| 2 | 36 | |
| 3 | 3 | |
| 4 | 7 | |
| 5 | 31 | |
| 6 | 270 | |
| 7 | 143 | |
| 8 | Processor design for portable systemsbreakdown → | 456 |
About Thomas D. Burd
Thomas D. Burd is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications, having authored 8 papers that have together received 1.1k indexed citations. Recurring topics across this work include Parallel Computing and Optimization Techniques (6 papers), Low-power high-performance VLSI design (5 papers) and Embedded Systems Design Techniques (4 papers). The work is most often cited by research in Hardware and Architecture (482 citations), Computer Networks and Communications (520 citations) and Electrical and Electronic Engineering (616 citations). Thomas D. Burd has collaborated with scholars based in United States and Canada. Frequent co-authors include R.W. Brodersen, Trevor Pering, Samuel Naffziger, Sean White, Gabriel H. Loh, Kevin M. Lepak, Alan Smith and Vishak Venkatraman. Their work appears in journals such as IEEE Journal of Solid-State Circuits and The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.