Sheldon Weng

605 total citations
35 papers, 443 citations indexed

About

Sheldon Weng is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Mechanical Engineering. According to data from OpenAlex, Sheldon Weng has authored 35 papers receiving a total of 443 indexed citations (citations by other indexed papers that have themselves been cited), including 34 papers in Electrical and Electronic Engineering, 12 papers in Biomedical Engineering and 3 papers in Mechanical Engineering. Recurrent topics in Sheldon Weng's work include Advanced DC-DC Converters (16 papers), Low-power high-performance VLSI design (12 papers) and Silicon Carbide Semiconductor Technologies (12 papers). Sheldon Weng is often cited by papers focused on Advanced DC-DC Converters (16 papers), Low-power high-performance VLSI design (12 papers) and Silicon Carbide Semiconductor Technologies (12 papers). Sheldon Weng collaborates with scholars based in United States and United Kingdom. Sheldon Weng's co-authors include Vivek De, Krishnan Ravichandran, Harish K. Krishnamurthy, James Tschanz, Xiaosen Liu, Nachiket Desai, Vaibhav Vaidya, Pavan Kumar, Kaladhar Radhakrishnan and Christopher Schaef and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Solid-State Circuits Letters and 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).

In The Last Decade

Sheldon Weng

33 papers receiving 442 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Sheldon Weng United States	13	425	145	39	34	19	35	443
Rinkle Jain United States	10	352 0.8×	134 0.9×	38 1.0×	52 1.5×	30 1.6×	17	358
Debashis Mandal United States	12	406 1.0×	222 1.5×	22 0.6×	19 0.6×	21 1.1×	38	430
Chen-Chih Huang Taiwan	12	482 1.1×	327 2.3×	42 1.1×	41 1.2×	21 1.1×	31	498
Stephen T. Kim United States	8	305 0.7×	125 0.9×	20 0.5×	27 0.8×	35 1.8×	8	314
Nachiket Desai United States	11	306 0.7×	96 0.7×	24 0.6×	58 1.7×	22 1.2×	40	351
Yang Jiang Macao	10	255 0.6×	69 0.5×	36 0.9×	67 2.0×	16 0.8×	53	278
Qadeer Khan United States	10	328 0.8×	177 1.2×	34 0.9×	30 0.9×	25 1.3×	32	341
Sudhir S. Kudva United States	9	296 0.7×	101 0.7×	15 0.4×	26 0.8×	43 2.3×	23	317
Byeong-Ha Park South Korea	14	653 1.5×	236 1.6×	10 0.3×	27 0.8×	16 0.8×	64	660
Ping Luo China	10	318 0.7×	102 0.7×	33 0.8×	57 1.7×	7 0.4×	85	333

Countries citing papers authored by Sheldon Weng

Since Specialization

Citations

This map shows the geographic impact of Sheldon Weng's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Sheldon Weng with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Sheldon Weng more than expected).

Fields of papers citing papers by Sheldon Weng

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Sheldon Weng. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Sheldon Weng. The network helps show where Sheldon Weng may publish in the future.

Co-authorship network of co-authors of Sheldon Weng

This figure shows the co-authorship network connecting the top 25 collaborators of Sheldon Weng. A scholar is included among the top collaborators of Sheldon Weng based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Sheldon Weng. Sheldon Weng is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

1.

Liu, Xiaosen, Nicolas Butzen, Sheldon Weng, et al.. (2025). A Monolithic 5.7 A/mm² 91% Peak Efficiency Scalable Multistage Modular Switched Capacitor Voltage Regulator for Base Die Vertical Power Delivery in 3D-ICs. IEEE Journal of Solid-State Circuits. 60(4). 1265–1276. 1 indexed citations

2.

Desai, Nachiket, Harish K. Krishnamurthy, Sheldon Weng, et al.. (2025). A 96.1% Peak Efficiency, 6.8 kW/in³, 48V-to-6V On-package Intermediate Bus Converter with LV-GaN Power Transistors. 1681–1686. 2 indexed citations

3.

Kim, Suhwan, Harish K. Krishnamurthy, Nachiket Desai, et al.. (2024). A Monolithic, 10.5 W/mm², 600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16 nm Class. IEEE Journal of Solid-State Circuits. 60(1). 75–84. 1 indexed citations

4.

Krishnamurthy, Harish K., Kaladhar Radhakrishnan, Vivek De, et al.. (2024). A 5.4V-Vin, 9.3A/mm² 10MHz Buck IVR Chiplet in 55nm BCD Featuring Self-Timed Bootstrap and Same-Cycle ZVS Control. 1–2.

5.

Liu, Xiaosen, Nicolas Butzen, Sheldon Weng, et al.. (2024). A Monolithic 5.7A/mm² 91% Peak Efficiency Scalable Multi-Stage Modular Switched Capacitor Voltage Regulator with Self-Timed Deadtime and Safe Startup for 3D-ICs. 1–2. 1 indexed citations

6.

Butzen, Nicolas, Harish K. Krishnamurthy, Sheldon Weng, et al.. (2024). A Monolithic 12.7 W/mm², 92% Peak-Efficiency Switched-Capacitor DC-DC Converter Using CSCR-First Topology. IEEE Journal of Solid-State Circuits. 59(12). 4114–4123. 1 indexed citations

7.

Butzen, Nicolas, et al.. (2024). 28.4 A Monolithic 12.7W/mm² Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC Converter. 462–464. 6 indexed citations

8.

Butzen, Nicolas, Harish K. Krishnamurthy, Sheldon Weng, et al.. (2023). A Monolithic 26 A/mm² Continuously Scalable Conversion Ratio Switched-Capacitor Converter With Phase-Merging Turbo and Communication-Less Ganging. IEEE Solid-State Circuits Letters. 6. 273–276. 1 indexed citations

9.

Kim, Suhwan, Sheldon Weng, Ashoke Ravi, et al.. (2023). 11.3 A 1.8W High-Frequency SIMO Converter Featuring Digital Sensor-Less Computational Zero-Current Operation and Non-Linear Duty-Boost. 10–12. 10 indexed citations

10.

Desai, Nachiket, Han Wui Then, Harish K. Krishnamurthy, et al.. (2022). A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors. IEEE Journal of Solid-State Circuits. 57(4). 1090–1099. 13 indexed citations

11.

Liu, Xiaosen, Harish K. Krishnamurthy, Taesik Na, et al.. (2021). A Universal Modular Hybrid LDO With Fast Load Transient Response and Programmable PSRR in 14-nm CMOS Featuring Dynamic Clamp Strength Tuning. IEEE Journal of Solid-State Circuits. 56(8). 2402–2415. 13 indexed citations

12.

Desai, Nachiket, Harish K. Krishnamurthy, Sheldon Weng, et al.. (2021). 17.4 Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing. 262–264. 11 indexed citations

13.

Krishnamurthy, Harish K., Charles Augustine, Xiaosen Liu, et al.. (2020). A Variation-Adaptive Integrated Computational Digital LDO in 22-nm CMOS With Fast Transient Response. IEEE Journal of Solid-State Circuits. 55(4). 977–987. 28 indexed citations

14.

Krishnamurthy, Harish K., Sheldon Weng, Xiaosen Liu, et al.. (2020). An Autonomous Reconfigurable Power Delivery Network (RPDN) for Many-Core SoCs Featuring Dynamic Current Steering. 1–2. 1 indexed citations

15.

Schaef, Christopher, Kaladhar Radhakrishnan, Krishnan Ravichandran, et al.. (2019). A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm CMOS With 2.5-nH Package-Embedded Air-Core Inductors. IEEE Journal of Solid-State Circuits. 54(12). 3316–3325. 23 indexed citations

16.

Schaef, Christopher, Sheldon Weng, William J. Lambert, et al.. (2019). 8.1 A 93.8% Peak Efficiency, 5V-Input, 10A Max I<inf>LOAD</inf> Flying Capacitor Multilevel Converter in 22nm CMOS Featuring Wide Output Voltage Range and Flying Capacitor Precharging. 146–148. 35 indexed citations

17.

Krishnamurthy, Harish K., Vaibhav Vaidya, Pavan Kumar, et al.. (2017). A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS. IEEE Journal of Solid-State Circuits. 53(1). 8–19. 56 indexed citations

18.

Krishnamurthy, Harish K., Sheldon Weng, Nachiket Desai, et al.. (2017). A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS. IEEE Journal of Solid-State Circuits. 53(4). 1038–1048. 37 indexed citations

19.

Krishnamurthy, Harish K., et al.. (2017). A digitally controlled fully integrated voltage regulator with 3D-TSV based on-die solenoid inductor with backside planar magnetic core in 14nm tri-gate CMOS. C148–C149. 7 indexed citations

20.

Krishnamurthy, Harish K., et al.. (2017). A digitally controlled fully integrated voltage regulator with 3D-TSV based on-die solenoid inductor with backside planar magnetic core in 14nm tri-gate CMOS. C148–C149. 4 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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