N. Arai

467 total citations
28 papers, 242 citations indexed

About

N. Arai is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications and Computational Theory and Mathematics. According to data from OpenAlex, N. Arai has authored 28 papers receiving a total of 242 indexed citations (citations by other indexed papers that have themselves been cited), including 26 papers in Electrical and Electronic Engineering, 7 papers in Computer Networks and Communications and 3 papers in Computational Theory and Mathematics. Recurrent topics in N. Arai's work include Semiconductor materials and devices (26 papers), Advanced Memory and Neural Computing (12 papers) and Advancements in Semiconductor Devices and Circuit Design (12 papers). N. Arai is often cited by papers focused on Semiconductor materials and devices (26 papers), Advanced Memory and Neural Computing (12 papers) and Advancements in Semiconductor Devices and Circuit Design (12 papers). N. Arai collaborates with scholars based in Japan. N. Arai's co-authors include K. Yoshikawa, S. Mori, Yukio Kaneko, Hiroyuki Tsunoda, K. Narita, Masaki Sato, Seiichi Mori, K. Imamiya, Tsutomu Shinagawa and S. Tanaka and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and Respiratory Investigation.

In The Last Decade

N. Arai

25 papers receiving 227 citations

Peers

N. Arai
C. Caillat Belgium
Siyoung Choi South Korea
H.K. Kang South Korea
Chi Chang United States
W. Lai United States
A. Subirats Belgium
L. Breuil Belgium
Louis Gerrer United Kingdom
R. Kies France
P. O’Neil United States
C. Caillat Belgium
N. Arai
Citations per year, relative to N. Arai N. Arai (= 1×) peers C. Caillat

Countries citing papers authored by N. Arai

Since Specialization
Citations

This map shows the geographic impact of N. Arai's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by N. Arai with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites N. Arai more than expected).

Fields of papers citing papers by N. Arai

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by N. Arai. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by N. Arai. The network helps show where N. Arai may publish in the future.

Co-authorship network of co-authors of N. Arai

This figure shows the co-authorship network connecting the top 25 collaborators of N. Arai. A scholar is included among the top collaborators of N. Arai based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with N. Arai. N. Arai is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Sawahata, Michiru, N. Arai, Noriharu Shijubo, et al.. (2025). The hygiene environment during childhood may affect susceptibility to sarcoidosis: A case-control study of environmental risk factors. Respiratory Investigation. 63(4). 672–679.
2.
Nakamura, Hiroki, K. Imamiya, Tamio Ikehashi, et al.. (2003). A 125 mm/sup 2/ 1Gb NAND flash memory with 10 MB/s program throughput. 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315). 1. 106–450. 2 indexed citations
3.
Yoshikawa, K., Seiichi Mori, N. Arai, et al.. (2003). A 3.3 V operation nonvolatile memory cell technology. 40–41.
4.
Yoshikawa, K., S. Mori, K. Narita, et al.. (2003). An asymmetrical lightly-doped source (ALDS) cell for virtual ground high density EPROMs. 432–435. 1 indexed citations
5.
Arai, F., N. Arai, S. Satoh, et al.. (2002). High-density (4.4F/sup 2/) NAND flash technology using Super-Shallow Channel Profile (SSCP) engineering. 775–778. 5 indexed citations
6.
Yoshikawa, K., et al.. (2002). Lucky-hole injection induced by band-to-band tunneling leakage in stacked gate transistors. 577–580. 13 indexed citations
7.
Imamiya, K., Hiroshi Nakamura, Tamio Ikehashi, et al.. (2002). A 125-mm/sup 2/ 1-Gb NAND flash memory with 10-MByte/s program speed. IEEE Journal of Solid-State Circuits. 37(11). 1493–1501. 15 indexed citations
8.
9.
Mori, S., et al.. (2002). Reliability study of thin inter-poly dielectrics for non-volatile memory application. 132–144. 9 indexed citations
10.
11.
Shibata, Akihiro, Hiroshi Kotaki, Takashi Ogura, et al.. (2002). Novel Nonvolatile Random Access Memory with Si Nanocrystals for Ultra Low Power Scheme. 1 indexed citations
12.
13.
Atsumi, S., Akira Umezawa, M. Kuriyama, et al.. (2002). A 3.3 V-only 16 Mb flash memory with row-decoding scheme. 42–43,. 1 indexed citations
14.
Arai, N., Hiroyuki Tsunoda, Yoshio Yamaguchi, et al.. (1994). The impact of intermetal dielectric layer and high temperature bake test on the reliability of nonvolatile memory devices. 57. 359–367. 8 indexed citations
15.
Mori, S., et al.. (1992). Bottom-oxide scaling for thin nitride/oxide interpoly dielectric in stacked-gate nonvolatile memory cells. IEEE Transactions on Electron Devices. 39(2). 283–291. 11 indexed citations
16.
Mori, S., N. Arai, Yukio Kaneko, & K. Yoshikawa. (1991). Polyoxide thinning limitation and superior ONO interpoly dielectric for nonvolatile memory devices. IEEE Transactions on Electron Devices. 38(2). 270–277. 26 indexed citations
17.
Yoshikawa, K., S. Mori, & N. Arai. (1990). An EPROM cell structure for EPLDs compatible with single poly-Si gate process. IEEE Transactions on Electron Devices. 37(3). 675–679. 3 indexed citations
18.
Arai, N., et al.. (1990). A new MOSFETs degradation induced by gate current in off-state condition. 73–74. 1 indexed citations
19.
Imamiya, K., J. Miyamoto, S. Atsumi, et al.. (1990). A 68-ns 4-Mbit CMOS EPROM with high-noise-immunity design. IEEE Journal of Solid-State Circuits. 25(1). 72–78. 4 indexed citations
20.
Tanaka, S., J. Miyamoto, S. Saito, et al.. (1987). A 4-Mbit CMOS EPROM. IEEE Journal of Solid-State Circuits. 22(5). 669–675. 8 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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