Junwhan Ahn

3.7k total citations · 2 hit papers
35 papers, 1.7k citations indexed

About

Junwhan Ahn is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering. According to data from OpenAlex, Junwhan Ahn has authored 35 papers receiving a total of 1.7k indexed citations (citations by other indexed papers that have themselves been cited), including 30 papers in Hardware and Architecture, 24 papers in Computer Networks and Communications and 13 papers in Electrical and Electronic Engineering. Recurrent topics in Junwhan Ahn's work include Parallel Computing and Optimization Techniques (29 papers), Advanced Data Storage Technologies (17 papers) and Interconnection Networks and Systems (9 papers). Junwhan Ahn is often cited by papers focused on Parallel Computing and Optimization Techniques (29 papers), Advanced Data Storage Technologies (17 papers) and Interconnection Networks and Systems (9 papers). Junwhan Ahn collaborates with scholars based in South Korea and United States. Junwhan Ahn's co-authors include Sungjoo Yoo, Ki‐Young Choi, Onur Mutlu, Sungpack Hong, Ki‐Young Choi, Eunhyeok Park, Dongyoung Kim, Hyunsun Park, Neha Agarwal and Nan Deng and has published in prestigious journals such as IEEE Transactions on Computers, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

Junwhan Ahn

35 papers receiving 1.7k citations

Hit Papers

A scalable processing-in-memory accelerator for parallel ... 2015 2026 2018 2022 2015 2015 100 200 300 400 500

Peers

Junwhan Ahn
Dimin Niu United States
Eric S. Chung United States
Adwait Jog United States
Juan Gómez-Luna Switzerland
Weiwen Jiang United States
Gennady Pekhimenko United States
Minsoo Rhu South Korea
Peter Milder United States
Ganesh Venkatesh United States
Ahmed Louri United States
Dimin Niu United States
Junwhan Ahn
Citations per year, relative to Junwhan Ahn Junwhan Ahn (= 1×) peers Dimin Niu

Countries citing papers authored by Junwhan Ahn

Since Specialization
Citations

This map shows the geographic impact of Junwhan Ahn's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Junwhan Ahn with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Junwhan Ahn more than expected).

Fields of papers citing papers by Junwhan Ahn

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Junwhan Ahn. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Junwhan Ahn. The network helps show where Junwhan Ahn may publish in the future.

Co-authorship network of co-authors of Junwhan Ahn

This figure shows the co-authorship network connecting the top 25 collaborators of Junwhan Ahn. A scholar is included among the top collaborators of Junwhan Ahn based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Junwhan Ahn. Junwhan Ahn is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Ahn, Junwhan, et al.. (2019). Software-Defined Far Memory in Warehouse-Scale Computers. 317–330. 70 indexed citations
2.
Ahn, Junwhan, et al.. (2017). Nonvolatile Write Buffer-Based Journaling Bypass for Storage Write Reduction in Mobile Devices. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 37(9). 1747–1759. 3 indexed citations
3.
Park, Hyunsun, et al.. (2017). Making DRAM Stronger Against Row Hammering. 1–6. 70 indexed citations
4.
Kim, Dongyoung, Junwhan Ahn, & Sungjoo Yoo. (2017). ZeNA: Zero-Aware Neural Network Accelerator. IEEE Design and Test. 35(1). 39–46. 68 indexed citations
5.
Ahn, Junwhan, et al.. (2015). A tiny-capacitor-backed non-volatile buffer to reduce storage writes in smartphones. 21–29. 4 indexed citations
6.
Ahn, Junwhan, et al.. (2015). A tiny-capacitor-backed non-volatile buffer to reduce storage writes in smartphones. 21–29. 3 indexed citations
7.
Lee, Jinho, Junwhan Ahn, Ki‐Young Choi, & Kyungsu Kang. (2015). THOR: Orchestrated thermal management of cores and networks in 3D many-core architectures. 27. 773–778. 7 indexed citations
8.
Ahn, Junwhan, et al.. (2015). Energy-efficient exclusive last-level hybrid caches consisting of SRAM and STT-RAM. 183–188. 13 indexed citations
9.
Ahn, Junwhan, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, & Ki‐Young Choi. (2015). A scalable processing-in-memory accelerator for parallel graph processing. 105–117. 535 indexed citations breakdown →
10.
Ahn, Junwhan, Sungjoo Yoo, & Ki‐Young Choi. (2015). Prediction Hybrid Cache: An Energy-Efficient STT-RAM Cache Architecture. IEEE Transactions on Computers. 65(3). 940–951. 40 indexed citations
11.
Ahn, Junwhan, Sungjoo Yoo, Onur Mutlu, & Ki‐Young Choi. (2015). PIM-enabled instructions. ACM SIGARCH Computer Architecture News. 43(3S). 336–348. 35 indexed citations
12.
Ahn, Junwhan, Sungpack Hong, Sungjoo Yoo, Onur Mutlu, & Ki‐Young Choi. (2015). A scalable processing-in-memory accelerator for parallel graph processing. ACM SIGARCH Computer Architecture News. 43(3S). 105–117. 108 indexed citations
13.
Ahn, Junwhan, Sungjoo Yoo, & Ki‐Young Choi. (2014). Dynamic Power Management of Off-Chip Links for Hybrid Memory Cubes. 1–6. 15 indexed citations
14.
Ahn, Junwhan, Sungjoo Yoo, & Ki‐Young Choi. (2013). Write intensity prediction for energy-efficient non-volatile caches. 223–228. 11 indexed citations
15.
Ahn, Junwhan & Ki‐Young Choi. (2013). LASIC: Loop-Aware Sleepy Instruction Caches Based on STT-RAM Technology. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22(5). 1197–1201. 4 indexed citations
16.
Ahn, Junwhan & Ki‐Young Choi. (2012). Isomorphism-Aware Identification of Custom Instructions With I/O Serialization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 32(1). 34–46. 6 indexed citations
17.
18.
Ahn, Junwhan & Ki‐Young Choi. (2012). Lower-bits cache for low power STT-RAM caches. 480–483. 18 indexed citations
19.
Ahn, Junwhan & Ki‐Young Choi. (2011). An efficient algorithm for isomorphism-aware custom instruction identification for extensible processors. 345–354. 3 indexed citations
20.
Ahn, Junwhan, et al.. (2011). A polynomial-time custom instruction identification algorithm based on dynamic programming. 573–578. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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