John Jose

701 total citations
68 papers, 431 citations indexed

About

John Jose is a scholar working on Computer Networks and Communications, Hardware and Architecture and Electrical and Electronic Engineering. According to data from OpenAlex, John Jose has authored 68 papers receiving a total of 431 indexed citations (citations by other indexed papers that have themselves been cited), including 57 papers in Computer Networks and Communications, 49 papers in Hardware and Architecture and 33 papers in Electrical and Electronic Engineering. Recurrent topics in John Jose's work include Interconnection Networks and Systems (54 papers), Parallel Computing and Optimization Techniques (36 papers) and Advanced Memory and Neural Computing (20 papers). John Jose is often cited by papers focused on Interconnection Networks and Systems (54 papers), Parallel Computing and Optimization Techniques (36 papers) and Advanced Memory and Neural Computing (20 papers). John Jose collaborates with scholars based in India, Italy and France. John Jose's co-authors include Karthik Sekaran, Madhu Mutyam, Abhijit Das, Maurizio Palesi, Sukumar Nandi, Prabhat Mishra, Vincenzo Catania, Giuseppe Ascia, Davide Patti and Salvatore Monteleone and has published in prestigious journals such as IEEE Transactions on Computers, IEEE Transactions on Parallel and Distributed Systems and Journal of Parallel and Distributed Computing.

In The Last Decade

John Jose

62 papers receiving 400 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
John Jose India 9 356 213 173 106 55 68 431
Daniel Becker United States 7 639 1.8× 446 2.1× 367 2.1× 53 0.5× 122 2.2× 9 747
Jieming Yin United States 13 316 0.9× 304 1.4× 178 1.0× 39 0.4× 23 0.4× 26 432
Zhiyi Yu China 13 415 1.2× 424 2.0× 317 1.8× 45 0.4× 23 0.4× 63 652
Enrique Vallejo Spain 13 411 1.2× 218 1.0× 174 1.0× 56 0.5× 45 0.8× 48 481
Eitan Zahavi Israel 15 662 1.9× 254 1.2× 262 1.5× 238 2.2× 28 0.5× 33 757
María E. Gómez Spain 18 855 2.4× 618 2.9× 364 2.1× 178 1.7× 92 1.7× 81 991
Sriram Vangal United States 5 731 2.1× 655 3.1× 472 2.7× 52 0.5× 96 1.7× 6 944
Gwangsun Kim South Korea 12 401 1.1× 379 1.8× 225 1.3× 82 0.8× 32 0.6× 25 507
Frédéric Pétrot France 12 273 0.8× 268 1.3× 196 1.1× 17 0.2× 26 0.5× 57 427
Hemangee K. Kapoor India 10 316 0.9× 344 1.6× 217 1.3× 31 0.3× 8 0.1× 104 446

Countries citing papers authored by John Jose

Since Specialization
Citations

This map shows the geographic impact of John Jose's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by John Jose with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites John Jose more than expected).

Fields of papers citing papers by John Jose

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by John Jose. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by John Jose. The network helps show where John Jose may publish in the future.

Co-authorship network of co-authors of John Jose

This figure shows the co-authorship network connecting the top 25 collaborators of John Jose. A scholar is included among the top collaborators of John Jose based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with John Jose. John Jose is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Jose, John, et al.. (2024). DRackSim: Simulating CXL-enabled Large-Scale Disaggregated Memory Systems. 3–14. 4 indexed citations
2.
Sankar, Syam, et al.. (2024). TROP: TRust-aware OPportunistic Routing in NoC with Hardware Trojans. ACM Transactions on Design Automation of Electronic Systems. 29(2). 1–25. 3 indexed citations
3.
Jose, John, et al.. (2023). Modelling and Impact Analysis of Antipode Attack in Bufferless On-Chip Networks. SN Computer Science. 4(3).
4.
Jose, John, et al.. (2023). Secure Routing Framework for Mitigating Time-Delay Trojan Attack in System-on-Chip. Journal of Systems Architecture. 144. 103006–103006. 3 indexed citations
5.
Sankar, Syam, et al.. (2023). Exploring Trustable Paths in Network-on-Chip for Low-Slack Packets. 85–86. 1 indexed citations
6.
Jose, John, et al.. (2022). Securing On-chip Interconnect against Delay Trojan using Dynamic Adaptive Caging. 411–416. 7 indexed citations
7.
Jose, John, et al.. (2022). Impact Analysis of Communication Overhead in NoC based DNN Hardware Accelerators. 2022 IEEE 19th India Council International Conference (INDICON). 1–6.
8.
Das, Abhijit & John Jose. (2022). Designing Data-Aware Network-on-Chip for Performance. 428–433. 1 indexed citations
9.
Jose, John, et al.. (2022). DAReS: Deflection Aware Rerouting between Subnetworks in Bufferless On-Chip Networks. 211–216. 3 indexed citations
10.
11.
Jose, John, et al.. (2021). Packet header attack by hardware trojan in NoC based TCMP and its impact analysis. 21–28. 12 indexed citations
12.
Jose, John, et al.. (2021). Energy Efficient Approximate MACs. 2021 IEEE 18th India Council International Conference (INDICON). 1–6. 3 indexed citations
13.
Das, Abhijit, et al.. (2020). SECTAR: Secure NoC using Trojan Aware Routing. 1–8. 27 indexed citations
14.
Jose, John, et al.. (2020). Traffic aware routing in 3D NoC using interleaved asymmetric edge routers. Nano Communication Networks. 27. 100334–100334. 8 indexed citations
15.
Jose, John, et al.. (2020). Router Buffer Caching for Managing Shared Cache Blocks in Tiled Multi-Core Processors. 239–246. 1 indexed citations
16.
Jose, John, et al.. (2018). Traffic Aware Deflection Rerouting Mechanism for Mesh Network on Chip. 11. 25–30. 3 indexed citations
17.
Jose, John, et al.. (2015). HiPAD: High Performance Adaptive Deflection Router for On-Chip Mesh Networks. 16–19. 1 indexed citations
18.
Jose, John & Madhu Mutyam. (2014). Implementation and Analysis of History-Based Output Channel Selection Strategies for Adaptive Routers in Mesh NoCs. ACM Transactions on Design Automation of Electronic Systems. 19(4). 1–22. 1 indexed citations
19.
Jose, John, et al.. (2013). DeBAR: deflection based adaptive router with minimal buffering. Design, Automation, and Test in Europe. 1583–1588. 21 indexed citations
20.
Jose, John, et al.. (2013). SLIDER: Smart Late Injection DEflection Router for mesh NoCs. 377–383. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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