Jer Min Jou

579 total citations
38 papers, 433 citations indexed

About

Jer Min Jou is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, Jer Min Jou has authored 38 papers receiving a total of 433 indexed citations (citations by other indexed papers that have themselves been cited), including 20 papers in Hardware and Architecture, 13 papers in Electrical and Electronic Engineering and 10 papers in Computer Networks and Communications. Recurrent topics in Jer Min Jou's work include VLSI and Analog Circuit Testing (12 papers), Interconnection Networks and Systems (10 papers) and Embedded Systems Design Techniques (8 papers). Jer Min Jou is often cited by papers focused on VLSI and Analog Circuit Testing (12 papers), Interconnection Networks and Systems (10 papers) and Embedded Systems Design Techniques (8 papers). Jer Min Jou collaborates with scholars based in Taiwan. Jer Min Jou's co-authors include Pei‐Yin Chen, Yeu-Horng Shiau, Yen‐Yu Chen, Chi-Chang Huang, Junwei Yang, Chih‐Liang Wang and Shiann-Rong Kuang and has published in prestigious journals such as IEEE Transactions on Communications, Fuzzy Sets and Systems and IEEE Transactions on Circuits and Systems for Video Technology.

In The Last Decade

Jer Min Jou

33 papers receiving 393 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Jer Min Jou Taiwan 9 194 141 134 88 85 38 433
S.D. Sherlekar India 10 180 0.9× 180 1.3× 65 0.5× 89 1.0× 113 1.3× 36 369
Guy Bois Canada 11 293 1.5× 45 0.3× 96 0.7× 29 0.3× 315 3.7× 80 568
Jeff Bier United States 7 143 0.7× 75 0.5× 55 0.4× 38 0.4× 333 3.9× 14 503
Mahesh Mehendale India 13 199 1.0× 229 1.6× 104 0.8× 91 1.0× 218 2.6× 47 509
Debjit Das Sarma United States 8 214 1.1× 88 0.6× 45 0.3× 20 0.2× 163 1.9× 9 395
Javier Hormigo Spain 12 168 0.9× 179 1.3× 85 0.6× 25 0.3× 121 1.4× 48 397
Salil K. Sanyal India 11 180 0.9× 84 0.6× 16 0.1× 54 0.6× 33 0.4× 47 365
Hongbing Pan China 11 235 1.2× 108 0.8× 37 0.3× 36 0.4× 86 1.0× 50 403
E.V. Jones United Kingdom 10 246 1.3× 214 1.5× 101 0.8× 28 0.3× 33 0.4× 31 395
Phil Lapsley United Kingdom 5 86 0.4× 91 0.6× 31 0.2× 23 0.3× 176 2.1× 6 357

Countries citing papers authored by Jer Min Jou

Since Specialization
Citations

This map shows the geographic impact of Jer Min Jou's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jer Min Jou with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jer Min Jou more than expected).

Fields of papers citing papers by Jer Min Jou

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jer Min Jou. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jer Min Jou. The network helps show where Jer Min Jou may publish in the future.

Co-authorship network of co-authors of Jer Min Jou

This figure shows the co-authorship network connecting the top 25 collaborators of Jer Min Jou. A scholar is included among the top collaborators of Jer Min Jou based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jer Min Jou. Jer Min Jou is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Jou, Jer Min, et al.. (2010). New model-driven design and generation of multi-facet arbiters part I. 258–261. 2 indexed citations
2.
Jou, Jer Min, et al.. (2005). A multi-tile reconfigurable platform design for DSP applications. 325–330. 1 indexed citations
3.
Jou, Jer Min, et al.. (2004). Efficient architectures for the biorthogonal wavelet transform by filter bank and lifting scheme. 87(7). 1867–1877. 6 indexed citations
5.
6.
Jou, Jer Min, et al.. (2002). Fast delay-dependent power estimation of large combinational circuits. 6. 53–56. 2 indexed citations
7.
Jou, Jer Min, et al.. (2002). A new fault simulator for large synchronous sequential circuits. 466–471.
8.
Jou, Jer Min, Yeu-Horng Shiau, & Chi-Chang Huang. (2002). An efficient VLSI architecture for HMM-based speech recognition. 1. 469–472. 6 indexed citations
9.
Chen, Pei‐Yin & Jer Min Jou. (2001). An efficient blocking-matching algorithm based on fuzzy reasoning. IEEE Transactions on Systems Man and Cybernetics Part B (Cybernetics). 31(2). 253–259. 5 indexed citations
10.
Jou, Jer Min, et al.. (2001). Dynamic pipeline design of an adaptive binary arithmetic coder. IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing. 48(9). 813–825. 11 indexed citations
11.
Chen, Pei‐Yin & Jer Min Jou. (2000). Adaptive arithmetic coding using fuzzy reasoning and grey prediction. Fuzzy Sets and Systems. 114(2). 239–254. 10 indexed citations
12.
Jou, Jer Min, et al.. (2000). An adaptive fuzzy logic controller: its VLSI architecture and applications. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 8(1). 52–60. 43 indexed citations
13.
Jou, Jer Min, et al.. (1999). Design of low-error fixed-width multipliers for DSP applications. IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing. 46(6). 836–842. 95 indexed citations
14.
Jou, Jer Min, et al.. (1999). A scalable pipelined architecture for separable 2-D discrete wavelet transform. 10. 205–208 vol.1.
15.
Jou, Jer Min, et al.. (1999). A new efficient fuzzy algorithm for color correction. IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications. 46(6). 773–775. 4 indexed citations
16.
Jou, Jer Min, et al.. (1997). Diagnostic fault simulation for synchronous sequential circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 16(3). 299–308. 4 indexed citations
17.
Jou, Jer Min, et al.. (1994). A fast and memory-efficient diagnostic fault simulation for sequential circuits. International Conference on Computer Aided Design. 723–726. 7 indexed citations
18.
Jou, Jer Min, et al.. (1994). A Fast And Memory-efficient Diagnostic Fault Simulation For Sequential Circuits. IEEE/ACM International Conference on Computer-Aided Design. 723–726. 1 indexed citations
19.
Jou, Jer Min, et al.. (1991). PASS: a package for automatic scheduling and sharing pipelined data paths. 1769–1772 vol.3. 4 indexed citations
20.
Jou, Jer Min, et al.. (1989). A new 3-layer rectilinear area router with obstacle avoidance. Integration. 7(1). 1–20. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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