Jatindra Kumar Deka

427 total citations
44 papers, 342 citations indexed

About

Jatindra Kumar Deka is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering. According to data from OpenAlex, Jatindra Kumar Deka has authored 44 papers receiving a total of 342 indexed citations (citations by other indexed papers that have themselves been cited), including 33 papers in Hardware and Architecture, 29 papers in Computer Networks and Communications and 23 papers in Electrical and Electronic Engineering. Recurrent topics in Jatindra Kumar Deka's work include VLSI and Analog Circuit Testing (26 papers), Interconnection Networks and Systems (26 papers) and Embedded Systems Design Techniques (11 papers). Jatindra Kumar Deka is often cited by papers focused on VLSI and Analog Circuit Testing (26 papers), Interconnection Networks and Systems (26 papers) and Embedded Systems Design Techniques (11 papers). Jatindra Kumar Deka collaborates with scholars based in India. Jatindra Kumar Deka's co-authors include Santosh Biswas, Biswajit Bhowmik, Sukumar Nandi, Rajendra Pamula, Bhargab B. Bhattacharya, P. P. Chakrabarti, Pallab Dasgupta, Sriram Sankaranarayanan, P. S. Robi and Saroj Biswas and has published in prestigious journals such as Artificial Intelligence, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

Jatindra Kumar Deka

42 papers receiving 333 citations

Peers

Jatindra Kumar Deka

CNC

HA

EEE

AI

EOMM

Peeter Ellervee Estonia

Anca Molnos Netherlands

Naraig Manjikian Canada

Davide Zoni Italy

Karthik Chandrasekar Netherlands

Aporva Amarnath United States

Christopher Celio United States

J.M. Mendı́as Spain

J. Adam Butts United States

V. Degalahal United States

Peeter Ellervee Estonia

Jatindra Kumar Deka

227 ×0.9

CNC

367 ×1.7

HA

216 ×1.2

EEE

29 ×0.5

AI

11 ×0.6

EOMM

Citations per year, relative to Jatindra Kumar Deka Jatindra Kumar Deka (= 1×) peers Peeter Ellervee

Countries citing papers authored by Jatindra Kumar Deka

Since Specialization

Citations

This map shows the geographic impact of Jatindra Kumar Deka's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jatindra Kumar Deka with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jatindra Kumar Deka more than expected).

Fields of papers citing papers by Jatindra Kumar Deka

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jatindra Kumar Deka. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jatindra Kumar Deka. The network helps show where Jatindra Kumar Deka may publish in the future.

Co-authorship network of co-authors of Jatindra Kumar Deka

This figure shows the co-authorship network connecting the top 25 collaborators of Jatindra Kumar Deka. A scholar is included among the top collaborators of Jatindra Kumar Deka based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jatindra Kumar Deka. Jatindra Kumar Deka is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

1.

Deka, Jatindra Kumar, et al.. (2023). Emerging Technology for Sustainable Development. Lecture notes in electrical engineering. 2 indexed citations

2.

Biswas, Santosh, et al.. (2020). Maximizing Yield through Retesting of Rejected Circuits using Approximation Technique. 6 indexed citations

3.

Bhowmik, Biswajit, Jatindra Kumar Deka, & Santosh Biswas. (2020). Reliability Monitoring in a Smart NoC Component. 1–4. 7 indexed citations

4.

Biswas, Santosh, et al.. (2020). Approximate Testing of Digital VLSI Circuits using Error Significance based Fault Analysis. 1–6. 2 indexed citations

5.

Bhowmik, Biswajit, Santosh Biswas, Jatindra Kumar Deka, & Bhargab B. Bhattacharya. (2019). A Low-Cost Test Solution for Reliable Communication in Networks-on-Chip. Journal of Electronic Testing. 35(2). 215–243. 9 indexed citations

6.

Biswas, Santosh, et al.. (2018). ATPG for Incomplete Testing of SoC and Power Aware TAM Architecture. 1–6. 1 indexed citations

7.

Bhowmik, Biswajit, Jatindra Kumar Deka, & Santosh Biswas. (2016). A concurrent approach to detect and diagnose shorts in interconnects of on-chip networks. 2418–2423. 2 indexed citations

8.

Bhowmik, Biswajit, Jatindra Kumar Deka, & Santosh Biswas. (2016). Towards a Scalable Test Solution for the Analysis of Interconnect Shorts in On-chip Networks. 394–399. 10 indexed citations

9.

Bhowmik, Biswajit, Jatindra Kumar Deka, Santosh Biswas, & Bhargab B. Bhattacharya. (2016). A topology-agnostic test model for link shorts in on-chip networks. 4561–4566. 9 indexed citations

10.

Bhowmik, Biswajit, Jatindra Kumar Deka, & Santosh Biswas. (2016). An on-line test solution for addressing interconnect shorts in on-chip networks. 9–12. 8 indexed citations

11.

Bhowmik, Biswajit, Jatindra Kumar Deka, Santosh Biswas, & Bhargab B. Bhattacharya. (2016). On-line detection and diagnosis of stuck-at faults in channels of NoC-based systems. 4567–4572. 11 indexed citations

12.

Bhowmik, Biswajit, Jatindra Kumar Deka, & Santosh Biswas. (2016). When Clustering Shows Optimality towards Analyzing Stuck-at Faults in Channels of On-chip Networks. 3. 868–875. 2 indexed citations

13.

Bhowmik, Biswajit, Santosh Biswas, & Jatindra Kumar Deka. (2016). Impact of NoC interconnect shorts on performance metrics. 1–6. 25 indexed citations

14.

Bhowmik, Biswajit, Santosh Biswas, Jatindra Kumar Deka, & Bhargab B. Bhattacharya. (2016). Detecting and diagnosing open faults in NoC channels on activation of diagonal nodes. 4573–4578. 8 indexed citations

15.

Bhowmik, Biswajit, Santosh Biswas, & Jatindra Kumar Deka. (2016). An odd-even scheme to prevent a packet from being corrupted and dropped in fault tolerant NoCs. 195–198. 7 indexed citations

16.

Bhowmik, Biswajit, Santosh Biswas, & Jatindra Kumar Deka. (2014). Detection of faulty interswitch links in 2-D mesh network-on-chips. 3. 1–6. 17 indexed citations

17.

Pamula, Rajendra, Jatindra Kumar Deka, & Sukumar Nandi. (2014). An outlier detection method based on cluster pruning. 138–141. 2 indexed citations

18.

Pamula, Rajendra, Jatindra Kumar Deka, & Sukumar Nandi. (2011). An Outlier Detection Method Based on Clustering. 253–256. 59 indexed citations

19.

Dasgupta, Pallab, P. P. Chakrabarti, Jatindra Kumar Deka, & Sriram Sankaranarayanan. (2001). Min-max Computation Tree Logic. Artificial Intelligence. 127(1). 137–162. 6 indexed citations

20.

Dasgupta, Pallab, Jatindra Kumar Deka, & P. P. Chakrabarti. (2000). Model checking on timed-event structures. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 19(5). 601–611. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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