Aporva Amarnath

653 total citations
16 papers, 399 citations indexed

About

Aporva Amarnath is a scholar working on Computer Networks and Communications, Hardware and Architecture and Electrical and Electronic Engineering. According to data from OpenAlex, Aporva Amarnath has authored 16 papers receiving a total of 399 indexed citations (citations by other indexed papers that have themselves been cited), including 10 papers in Computer Networks and Communications, 10 papers in Hardware and Architecture and 6 papers in Electrical and Electronic Engineering. Recurrent topics in Aporva Amarnath's work include Parallel Computing and Optimization Techniques (10 papers), Interconnection Networks and Systems (8 papers) and Embedded Systems Design Techniques (4 papers). Aporva Amarnath is often cited by papers focused on Parallel Computing and Optimization Techniques (10 papers), Interconnection Networks and Systems (8 papers) and Embedded Systems Design Techniques (4 papers). Aporva Amarnath collaborates with scholars based in United States, United Kingdom and Israel. Aporva Amarnath's co-authors include Ronald Dreslinski, Subhankar Pal, Siying Feng, Dong-Hyeon Park, Trevor Mudge, Jonathan Beaumont, Chaitali Chakrabarti, David Blaauw, Hun-Seok Kim and Austin Rovinski and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Micro and ACM Journal on Emerging Technologies in Computing Systems.

In The Last Decade

Aporva Amarnath

16 papers receiving 394 citations

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author Last Decade Papers Cites
Aporva Amarnath 241 181 148 120 89 16 399
Subhankar Pal 233 1.0× 162 0.9× 129 0.9× 126 1.1× 95 1.1× 24 379
Siying Feng 226 0.9× 156 0.9× 128 0.9× 122 1.0× 90 1.0× 19 378
Dong-Hyeon Park 196 0.8× 131 0.7× 106 0.7× 115 1.0× 86 1.0× 8 312
Victor A. Ying 256 1.1× 160 0.9× 303 2.0× 188 1.6× 117 1.3× 9 497
Bahar Asgari 116 0.5× 136 0.8× 100 0.7× 109 0.9× 83 0.9× 29 314
Fabian Schuiki 246 1.0× 176 1.0× 185 1.3× 60 0.5× 53 0.6× 18 403
David Koeplinger 387 1.6× 261 1.4× 138 0.9× 60 0.5× 56 0.6× 14 487
Hanchen Jin 227 0.9× 126 0.7× 108 0.7× 68 0.6× 89 1.0× 6 326
Raghu Prabhakar 454 1.9× 315 1.7× 180 1.2× 56 0.5× 66 0.7× 21 552
Richard Membarth 184 0.8× 99 0.5× 63 0.4× 99 0.8× 32 0.4× 33 304

Countries citing papers authored by Aporva Amarnath

Since Specialization
Citations

This map shows the geographic impact of Aporva Amarnath's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Aporva Amarnath with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Aporva Amarnath more than expected).

Fields of papers citing papers by Aporva Amarnath

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Aporva Amarnath. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Aporva Amarnath. The network helps show where Aporva Amarnath may publish in the future.

Co-authorship network of co-authors of Aporva Amarnath

This figure shows the co-authorship network connecting the top 25 collaborators of Aporva Amarnath. A scholar is included among the top collaborators of Aporva Amarnath based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Aporva Amarnath. Aporva Amarnath is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

16 of 16 papers shown
1.
2.
Pal, Subhankar, Aporva Amarnath, Augusto Vega, et al.. (2025). ARTEMIS: Agile Discovery of Efficient Real-Time Systems-on-Chips in the Heterogeneous Era. 1320–1334. 2 indexed citations
3.
Park, Yongmo, Aporva Amarnath, Subhankar Pal, et al.. (2025). FHENDI: A Near-DRAM Accelerator for Compiler-Generated Fully Homomorphic Encryption Applications. 1127–1142. 2 indexed citations
4.
Park, Yongmo, Subhankar Pal, Aporva Amarnath, et al.. (2024). Dramaton: A Near-DRAM Accelerator for Large Number Theoretic Transforms. IEEE Computer Architecture Letters. 23(1). 108–111. 4 indexed citations
5.
Amarnath, Aporva, Subhankar Pal, Augusto Vega, et al.. (2021). Heterogeneity-Aware Scheduling on SoCs for Autonomous Vehicles. IEEE Computer Architecture Letters. 20(2). 82–85. 9 indexed citations
6.
Pal, Subhankar, Aporva Amarnath, Siying Feng, et al.. (2021). SparseAdapt: Runtime Control for Sparse Linear Algebra on a Reconfigurable Accelerator. Edinburgh Research Explorer. 1005–1021. 11 indexed citations
7.
Amarnath, Aporva, et al.. (2021). A Survey Describing Beyond Si Transistors and Exploring Their Implications for Future Processors. ACM Journal on Emerging Technologies in Computing Systems. 17(3). 1–44. 10 indexed citations
8.
He, Xin, Subhankar Pal, Aporva Amarnath, et al.. (2020). Sparse-TPU. 1–12. 62 indexed citations
9.
Park, Dong-Hyeon, Subhankar Pal, Siying Feng, et al.. (2020). A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix–Matrix Multiplication Accelerator. IEEE Journal of Solid-State Circuits. 55(4). 933–944. 14 indexed citations
10.
Pal, Subhankar, Siying Feng, Dong-Hyeon Park, et al.. (2020). Transmuter. Edinburgh Research Explorer. 175–190. 14 indexed citations
11.
Pal, Subhankar, Dong-Hyeon Park, Siying Feng, et al.. (2019). A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. C150–C151. 6 indexed citations
12.
Amarnath, Aporva, et al.. (2019). 3DTUBE: A Design Framework for High-Variation Carbon Nanotube-based Transistor Technology. 1–6. 2 indexed citations
13.
Pal, Subhankar, Dong-Hyeon Park, Siying Feng, et al.. (2019). A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. C150–C151. 10 indexed citations
14.
Davidson, Scott, Christopher Torng, Austin Rovinski, et al.. (2018). The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips. IEEE Micro. 38(2). 30–41. 59 indexed citations
15.
Pal, Subhankar, Jonathan Beaumont, Dong-Hyeon Park, et al.. (2018). OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator. 724–736. 190 indexed citations
16.
Amarnath, Aporva, et al.. (2017). A carbon nanotube transistor based RISC-V processor using pass transistor logic. 1–6. 3 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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