Ioannis Papaefstathiou

2.3k total citations
140 papers, 1.5k citations indexed

About

Ioannis Papaefstathiou is a scholar working on Computer Networks and Communications, Hardware and Architecture and Artificial Intelligence. According to data from OpenAlex, Ioannis Papaefstathiou has authored 140 papers receiving a total of 1.5k indexed citations (citations by other indexed papers that have themselves been cited), including 72 papers in Computer Networks and Communications, 60 papers in Hardware and Architecture and 45 papers in Artificial Intelligence. Recurrent topics in Ioannis Papaefstathiou's work include Parallel Computing and Optimization Techniques (35 papers), Interconnection Networks and Systems (30 papers) and Embedded Systems Design Techniques (27 papers). Ioannis Papaefstathiou is often cited by papers focused on Parallel Computing and Optimization Techniques (35 papers), Interconnection Networks and Systems (30 papers) and Embedded Systems Design Techniques (27 papers). Ioannis Papaefstathiou collaborates with scholars based in Greece, Italy and United Arab Emirates. Ioannis Papaefstathiou's co-authors include Charalampos Manifavas, George Hatzivasilis, Konstantinos Fysarakis, Dionisios Pnevmatikatos, Ioannis Askoxylakis, Vassilis Papaefstathiou, Apostolos Dollas, Dimitris Bouris, Theodοre Zahariadis and Panagiotis Karkazis and has published in prestigious journals such as International Journal of Remote Sensing, IEEE Internet of Things Journal and Future Generation Computer Systems.

In The Last Decade

Ioannis Papaefstathiou

135 papers receiving 1.4k citations

Peers

Countries citing papers authored by Ioannis Papaefstathiou

Since Specialization

Citations

This map shows the geographic impact of Ioannis Papaefstathiou's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Ioannis Papaefstathiou with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Ioannis Papaefstathiou more than expected).

Fields of papers citing papers by Ioannis Papaefstathiou

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Ioannis Papaefstathiou. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Ioannis Papaefstathiou. The network helps show where Ioannis Papaefstathiou may publish in the future.

Co-authorship network of co-authors of Ioannis Papaefstathiou

This figure shows the co-authorship network connecting the top 25 collaborators of Ioannis Papaefstathiou. A scholar is included among the top collaborators of Ioannis Papaefstathiou based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Ioannis Papaefstathiou. Ioannis Papaefstathiou is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Fast, Accurate and Distributed Simulation of novel HPC systems incorporating ARM and RISC-V CPUs 2024 ·Zenodo (CERN European Organization for Nuclear Research) ·(unknown), Ioannis Papaefstathiou	1
2	REBECCA: Reconfigurable Heterogeneous Highly Parallel Processing Platform for Safe and Secure AI 2024 ·(unknown), (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), Grigorios G. Chrysos, Sotiris Ioannidis, Ioannis Papaefstathiou	0
3	A Novel Integrated Simulation Framework for Cyber-Physical Systems Modelling 2023 ·IEEE Transactions on Parallel and Distributed Systems ·(unknown), (unknown), Ioannis Papaefstathiou	5
4	An Open-source Implementation of LSTM and GRU in the Ptolemy Simulation Framework 2021 ·(unknown), (unknown), (unknown), Ioannis Papaefstathiou	1
5	SecRoute: End-to-end secure communications for wireless ad-hoc networks 2017 ·George Hatzivasilis, Ioannis Papaefstathiou, Konstantinos Fysarakis, Ioannis Askoxylakis	10
6	On-board computational efficiency in real time UAV embedded terrain reconstruction 2014 ·EGU General Assembly Conference Abstracts ·Panagiotis Partsinevelos, (unknown), (unknown), Ioannis Papaefstathiou, (unknown), (unknown), (unknown), (unknown)	4
7	Embedded Systems Security: A Survey of EU Research Efforts 2014 ·Security and Communication Networks ·Charalampos Manifavas, Konstantinos Fysarakis, Αλέξανδρος Παπανικολάου, Ioannis Papaefstathiou	7
8	HPC-gSpan: An FPGA-based parallel system for frequent subgraph mining 2014 ·(unknown), Grigorios G. Chrysos, Ioannis Papaefstathiou, Apostolos Dollas	8
9	Fast, FPGA-based Rainbow Table creation for attacking encrypted mobile communications 2013 ·Zenodo (CERN European Organization for Nuclear Research) ·(unknown), Dionisios Pnevmatikatos, Ioannis Papaefstathiou, Charalampos Manifavas	8
10	A novel low-power embedded object recognition system working at multi-frames per second 2013 ·ACM Transactions on Embedded Computing Systems ·(unknown), Savvas Papaioannou, Ioannis Papaefstathiou	4
11	An FPGA-based parallel processor for black-scholes option pricing using finite differences schemes 2012 ·Design, Automation, and Test in Europe ·(unknown), (unknown), Ioannis Papaefstathiou	1
12	Fast and power-efficient hardware implementation of a routing scheme for WSNs 2012 ·(unknown), Ioannis Papaefstathiou	4
13	Reconfiguration in Wireless Sensor NeTworks 2010 ·Helen C. Leligou, L. M. Redondo, Theodοre Zahariadis, (unknown), Panagiotis Karkazis, Ioannis Papaefstathiou, (unknown)	2
14	Design and implementation of a database filter for BLAST acceleration 2009 ·Design, Automation, and Test in Europe ·(unknown), (unknown), (unknown), (unknown), (unknown), Ioannis Papaefstathiou, Dionisios Pnevmatikatos	2
15	Using reconfigurable hardware devices in WSNs for accelerating and reducing the power consumption of header processing tasks 2009 ·(unknown), (unknown), Ioannis Papaefstathiou	5
16	High-speed FPGA-based implementations of a Genetic Algorithm 2009 ·(unknown), (unknown), Ioannis Papaefstathiou	25
17	Queue Management in Network Processors 2005 ·Design, Automation, and Test in Europe ·Ioannis Papaefstathiou, ‪Theofanis Orphanoudakis‬, George Kornaros, (unknown), (unknown), (unknown)	4
18	Software processing performance in network processors 2004 ·Design, Automation, and Test in Europe ·Ioannis Papaefstathiou, George Kornaros, (unknown)	2
19	GFS: an efficient implementation of fair scheduling for multigigabit packet networks 2004 ·George Kornaros, ‪Theofanis Orphanoudakis‬, Ioannis Papaefstathiou	3
20	A fully-programmable memory management system optimizing queue handling at multi gigabit rates 2003 ·George Kornaros, Ioannis Papaefstathiou, (unknown), (unknown)	14

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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