E.Y. Chou

676 citations

14 papers · 483 indexed · 1 hit paper · h-index 6

Hardware and Architecture top 5%
Computational Theory and Mathematics top 5%
Electrical and Electronic Engineering top 10%
- Advanced Memory and Neural Computing 7
- Advanced MEMS and NEMS Technologies 1
- VLSI and FPGA Design Techniques 1
- CCD and CMOS Imaging Sensors 1
Artificial Intelligence top 10%
- Neural Networks and Applications 7
Biomedical Engineering
- Analog and Mixed-Signal Circuit Design 2
Computer Networks and Communications
- Neural Networks Stability and Synchronization 6
Ecology
- Physiological and biochemical adaptations 1

Co-authors: W.C. Athas N. Tzartzanis Lars Svensson J.G. Koller B.J. Sheu KyungHi Chang Claudio Adragna Fanglin Chen
Cited by: Hardware and Architecture Computational Theory and Mathematics Electrical and Electronic Engineering
Journals: IEEE Circuits and Devices Magazine (2 papers)IEEE Transactions on Very Large Scale Integration (VLSI) Systems (1 paper)Proceedings of the Royal Society B Biological Sciences (1 paper)
Partner nations: United States Taiwan Switzerland

In The Last Decade

E.Y. Chou

12 papers receiving 419 citations

Hit Papers

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Peers

Countries citing papers authored by E.Y. Chou

Since Specialization

Citations

This map shows the geographic impact of E.Y. Chou's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by E.Y. Chou with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites E.Y. Chou more than expected).

Fields of papers citing papers by E.Y. Chou

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by E.Y. Chou. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by E.Y. Chou. The network helps show where E.Y. Chou may publish in the future.

Co-authorship network

The 16 scholars most cited alongside E.Y. Chou, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with E.Y. Chou Line = papers co-authored together E.Y. Chou links everyone, so they are left out of the graph.

All Works

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14 of 14 papers shown

#	Work
1	Molecular mechanisms underlying the evolution of a color polyphenism by genetic accommodation in the tobacco hornworm, Manduca sexta Proceedings of the National Academy of Sciences ·Yuichiro Suzuki,F Tonke,Paula González,Firni Dwi Sari,En-Yu Yeh,Iyiola Sina,Eman Reyad MUSTAFA,E.Y. Chou,Н. В. Дашкевич,Wawan Rahardianto,真由美玉川,H. Frederik Nijhout,Brian Tjaden	2025	1
2	Polycomb group proteins confer robustness to aposematic coloration in the milkweed bug, Oncopeltus fasciatus Proceedings of the Royal Society B Biological Sciences ·Mayesse Aparecida da Silva,Laura Park,E.Y. Chou,Eman Reyad MUSTAFA,Neneng Ariska,Yuichiro Suzuki	2024	2
3	Ripple steering AC-DC converters to minimize input filter E.Y. Chou,Fanglin Chen,Claudio Adragna,Bei Lu	2009	12
4	A neural network communication equalizer with optimized solution capability Proceedings of International Conference on Neural Networks (ICNN'96) ·Maurício G. S. Barreto,B.J. Sheu,E.Y. Chou	2002	1
5	VLSI design of densely-connected array processors E.Y. Chou,B.J. Sheu,Xin Zhan,KyungHi Chang	2002	0
6	A hippocampal model implementation using VLSI table-look-up and model-based approaches 伍绍祖,E.Y. Chou,B.J. Sheu,Theodore W. Berger	2002	2
7	Nanometer mixed-signal system-on-a-chip design IEEE Circuits and Devices Magazine ·E.Y. Chou,B.J. Sheu	2002	6
8	A compact VLSI design for recursive neural networks with hardware annealing capability E.Y. Chou,B.J. Sheu,S.H. Jen	2002	0
9	System-on-a-chip design for modern communications IEEE Circuits and Devices Magazine ·E.Y. Chou,B.J. Sheu	2001	6
10	A compact neural network for partial-response maximum-likelihood detectors: algorithmic study IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ·E.Y. Chou,B.J. Sheu,И.И. Судницын	1998	3
11	VLSI design of optimization and image processing cellular neural networks IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications ·E.Y. Chou,B.J. Sheu,KyungHi Chang	1997	15
12	A state-constrained model for cellular nonlinear network optimization IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications ·E.Y. Chou,B.J. Sheu,伍绍祖	1997	4
13	A hardware annealing method for optimal solutions on cellular neural networks IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ·Atefeh Mosayebi Ardakani,B.J. Sheu,E.Y. Chou	1996	8
14	Low-power digital systems based on adiabatic-switching principlesbreakdown → IEEE Transactions on Very Large Scale Integration (VLSI) Systems ·W.C. Athas,Lars Svensson,J.G. Koller,N. Tzartzanis,E.Y. Chou	1994	423

About E.Y. Chou

E.Y. Chou is a scholar working on Computer Networks and Communications, Artificial Intelligence, Electrical and Electronic Engineering, Hardware and Architecture and Ecology, Evolution, Behavior and Systematics, having authored 14 papers that have together received 483 indexed citations. Recurring topics across this work include Neural Networks and Applications (7 papers), Advanced Memory and Neural Computing (7 papers), Neural Networks Stability and Synchronization (6 papers), Analog and Mixed-Signal Circuit Design (2 papers), Advanced MEMS and NEMS Technologies (1 paper), Physiological and biochemical adaptations (1 paper), VLSI and FPGA Design Techniques (1 paper) and CCD and CMOS Imaging Sensors (1 paper). The work is most often cited by research in Hardware and Architecture (101 citations), Computational Theory and Mathematics (138 citations), Electrical and Electronic Engineering (395 citations), Artificial Intelligence (105 citations) and Biomedical Engineering (121 citations). E.Y. Chou has collaborated with scholars based in United States, Taiwan and Switzerland. Frequent co-authors include W.C. Athas, N. Tzartzanis, Lars Svensson, J.G. Koller, B.J. Sheu, KyungHi Chang, Claudio Adragna, Fanglin Chen, Bei Lu and Theodore W. Berger. Their work appears in journals such as IEEE Circuits and Devices Magazine, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Proceedings of the Royal Society B Biological Sciences, Proceedings of the National Academy of Sciences and IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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