David H. Albonesi

6.5k total citations
102 papers, 4.6k citations indexed

About

David H. Albonesi is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, David H. Albonesi has authored 102 papers receiving a total of 4.6k indexed citations (citations by other indexed papers that have themselves been cited), including 82 papers in Hardware and Architecture, 57 papers in Electrical and Electronic Engineering and 52 papers in Computer Networks and Communications. Recurrent topics in David H. Albonesi's work include Parallel Computing and Optimization Techniques (81 papers), Interconnection Networks and Systems (39 papers) and Low-power high-performance VLSI design (34 papers). David H. Albonesi is often cited by papers focused on Parallel Computing and Optimization Techniques (81 papers), Interconnection Networks and Systems (39 papers) and Low-power high-performance VLSI design (34 papers). David H. Albonesi collaborates with scholars based in United States, Spain and Switzerland. David H. Albonesi's co-authors include Sandhya Dwarkadas, Rajeev Balasubramonian, Alper Buyuktosunoglu, G. Semeraro, Grigorios Magklis, Michael L. Scott, Nicholas A. Nelson, Mikhail Haurylau, Philippe M. Fauchet and Eby G. Friedman and has published in prestigious journals such as Computer, IEEE Transactions on Computers and IEEE Journal of Selected Topics in Quantum Electronics.

In The Last Decade

David H. Albonesi

97 papers receiving 4.4k citations

Peers

David H. Albonesi

EEE

CNC

Sudhakar Yalamanchili United States

Mike O’Connor United States

Rathijit Sen United States

Nathan Binkert United States

Joel Hestness United States

Natalie Enright Jerger Canada

Engin İpek United States

Hamid Sarbazi‐Azad Iran

Arkaprava Basu India

T. Austin United States

Sudhakar Yalamanchili United States

David H. Albonesi

1.8k ×0.6

999 ×0.4

EEE

1.9k ×0.8

CNC

441 ×1.0

258 ×1.0

Citations per year, relative to David H. Albonesi David H. Albonesi (= 1×) peers Sudhakar Yalamanchili

Countries citing papers authored by David H. Albonesi

Since Specialization

Citations

This map shows the geographic impact of David H. Albonesi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by David H. Albonesi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites David H. Albonesi more than expected).

Fields of papers citing papers by David H. Albonesi

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by David H. Albonesi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by David H. Albonesi. The network helps show where David H. Albonesi may publish in the future.

Co-authorship network of co-authors of David H. Albonesi

This figure shows the co-authorship network connecting the top 25 collaborators of David H. Albonesi. A scholar is included among the top collaborators of David H. Albonesi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with David H. Albonesi. David H. Albonesi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Srivastava, Nitish, Hanchen Jin, Jie Liu, David H. Albonesi, & Zhiru Zhang. (2020). MatRaptor: A Sparse-Sparse Matrix Multiplication Accelerator Based on Row-Wise Product. 766–780. 146 indexed citations

Srivastava, Nitish, Hanchen Jin, Shaden Smith, et al.. (2020). Tensaurus: A Versatile Accelerator for Mixed Sparse-Dense Tensor Computations. 689–702. 78 indexed citations

Shoemaker, Christine A., et al.. (2020). CuttleSys: Data-Driven Resource Management for Interactive Services on Reconfigurable Multicores. 650–664. 18 indexed citations

Albonesi, David H., et al.. (2010). Scalable thread scheduling and global power management for heterogeneous many-core architectures. 29–40. 110 indexed citations

Albonesi, David H., et al.. (2009). Phastlane. ACM SIGARCH Computer Architecture News. 37(3). 441–450. 43 indexed citations

Dropsho, S., et al.. (2007). Rate-Driven Control of Resizable Caches for Highly Threaded SMT Processors. International Conference on Parallel Architectures and Compilation Techniques. 416–416. 2 indexed citations

El‐Moursy, Ali A., et al.. (2006). Compatible phase co-scheduling on a CMP of multi-threaded processors. International Parallel and Distributed Processing Symposium. 141–141. 43 indexed citations

Albonesi, David H., et al.. (2004). Mitigating inductive noise in SMT processors. 332–337. 17 indexed citations

Albonesi, David H., et al.. (2004). AN EVALUATION OF A CONFIGURABLE VLIW MICROARCHITECTURE FOR EMBEDDED DSP APPLICATIONS. Journal of Circuits Systems and Computers. 13(6). 1321–1345.

10.

Buyuktosunoglu, Alper, Tejas S. Karkhanis, David H. Albonesi, & Pradip Bose. (2003). Energy efficient co-adaptive instruction fetch and issue. 147–147. 47 indexed citations

11.

Magklis, Grigorios, Michael L. Scott, G. Semeraro, David H. Albonesi, & Steven Dropsho. (2003). Profile-based dynamic voltage and frequency scaling for a multiple clock domain microprocessor. ACM SIGARCH Computer Architecture News. 31(2). 14–27. 28 indexed citations

12.

Dropsho, Steven, Volkan Kursun, David H. Albonesi, Sandhya Dwarkadas, & Eby G. Friedman. (2002). Managing static leakage energy in microprocessor functional units. International Symposium on Microarchitecture. 321–332. 57 indexed citations

13.

Dropsho, S., Alper Buyuktosunoglu, Rajeev Balasubramonian, et al.. (2002). Integrating adaptive on-chip storage structures for reduced dynamic power. International Conference on Parallel Architectures and Compilation Techniques. 141–152. 91 indexed citations

14.

Bose, Pradip, David Brooks, Alper Buyuktosunoglu, et al.. (2002). Early-Stage Definition of LPX: a Low Power Issue-Execute Processor. 1 indexed citations

15.

Balasubramonian, Rajeev, Sandhya Dwarkadas, & David H. Albonesi. (2001). Reducing the complexity of the register file in dynamic superscalar processors. International Symposium on Microarchitecture. 237–248. 144 indexed citations

16.

Buyuktosunoglu, Alper, S.E. Schuster, David Brooks, et al.. (2000). An Adaptive Issue Queue for Reduced Power at High Performance. 8 indexed citations

17.

Albonesi, David H.. (1999). Selective cache ways: on-demand cache resource allocation. International Symposium on Microarchitecture. 248–259. 439 indexed citations

18.

Albonesi, David H.. (1998). Dynamic IPC/clock rate optimization. 26(3). 282–292. 78 indexed citations

19.

Albonesi, David H. & Israel Koren. (1997). Improving the memory bandwidth of highly-integrated, wide-issue, microprocessor-based systems. International Conference on Parallel Architectures and Compilation Techniques. 126–135. 1 indexed citations

20.

Albonesi, David H. & Israel Koren. (1995). An analytical model of high performance superscalar-based multiprocessors. International Conference on Parallel Architectures and Compilation Techniques. 194–203. 9 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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