Daniel Thiele

515 total citations
17 papers, 346 citations indexed

About

Daniel Thiele is a scholar working on Computer Networks and Communications, Hardware and Architecture and Computational Theory and Mathematics. According to data from OpenAlex, Daniel Thiele has authored 17 papers receiving a total of 346 indexed citations (citations by other indexed papers that have themselves been cited), including 16 papers in Computer Networks and Communications, 16 papers in Hardware and Architecture and 4 papers in Computational Theory and Mathematics. Recurrent topics in Daniel Thiele's work include Real-Time Systems Scheduling (14 papers), Network Time Synchronization Technologies (14 papers) and Embedded Systems Design Techniques (10 papers). Daniel Thiele is often cited by papers focused on Real-Time Systems Scheduling (14 papers), Network Time Synchronization Technologies (14 papers) and Embedded Systems Design Techniques (10 papers). Daniel Thiele collaborates with scholars based in Germany and United Kingdom. Daniel Thiele's co-authors include Rolf Ernst, Jonas Diemer, Philip Axer, Simon Schliecker and Kai Richter and has published in prestigious journals such as Real-Time Systems, Journal of Real-Time Image Processing and SAE International journal of passenger cars. Electronic and electrical systems.

In The Last Decade

Daniel Thiele

16 papers receiving 335 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Daniel Thiele Germany	11	299	263	90	65	29	17	346
Jonas Diemer Germany	10	347 1.2×	339 1.3×	87 1.0×	62 1.0×	17 0.6×	21	392
Till Steinbach Germany	12	325 1.1×	233 0.9×	43 0.5×	130 2.0×	23 0.8×	24	397
Astrit Ademaj Austria	10	391 1.3×	338 1.3×	106 1.2×	88 1.4×	16 0.6×	22	458
Voica Gavriluţ Denmark	7	314 1.1×	210 0.8×	63 0.7×	38 0.6×	31 1.1×	9	328
Kanghee Kim South Korea	9	177 0.6×	237 0.9×	106 1.2×	51 0.8×	14 0.5×	30	371
Patrick Meumeu Yomsi Portugal	11	267 0.9×	257 1.0×	63 0.7×	63 1.0×	14 0.5×	49	382
Jonathan Falk Germany	6	279 0.9×	156 0.6×	36 0.4×	49 0.8×	48 1.7×	10	295
Eike Schweissguth Germany	6	285 1.0×	135 0.5×	29 0.3×	60 0.9×	40 1.4×	12	319
Dakshina Dasari Portugal	12	295 1.0×	482 1.8×	105 1.2×	36 0.6×	4 0.1×	30	512
Hansson Sweden	2	164 0.5×	277 1.1×	129 1.4×	29 0.4×	5 0.2×	4	316

Countries citing papers authored by Daniel Thiele

Since Specialization

Citations

This map shows the geographic impact of Daniel Thiele's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Daniel Thiele with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Daniel Thiele more than expected).

Fields of papers citing papers by Daniel Thiele

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Daniel Thiele. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Daniel Thiele. The network helps show where Daniel Thiele may publish in the future.

Co-authorship network of co-authors of Daniel Thiele

This figure shows the co-authorship network connecting the top 25 collaborators of Daniel Thiele. A scholar is included among the top collaborators of Daniel Thiele based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Daniel Thiele. Daniel Thiele is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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17 of 17 papers shown

Thiele, Daniel & Rolf Ernst. (2016). Formal worst-case performance analysis of time-sensitive Ethernet with frame preemption. Zenodo (CERN European Organization for Nuclear Research). 1–9. 55 indexed citations

Thiele, Daniel & Rolf Ernst. (2016). Formal Analysis Based Evaluation of Software Defined Networking for Time-Sensitive Ethernet. 31–36. 26 indexed citations

Thiele, Daniel, et al.. (2016). Invited - Towards fail-operational ethernet based in-vehicle networks. Zenodo (CERN European Organization for Nuclear Research). 13 indexed citations

Thiele, Daniel & Rolf Ernst. (2016). Formal Worst-Case Timing Analysis of Ethernet TSN’s Burst-Limiting Shaper. 187–192. 15 indexed citations

Thiele, Daniel, Rolf Ernst, & Jonas Diemer. (2015). Formal worst-case timing analysis of Ethernet TSN's time-aware and peristaltic shapers. 251–258. 63 indexed citations

Thiele, Daniel, Philip Axer, & Rolf Ernst. (2015). Improving formal timing analysis of switched ethernet by exploiting FIFO scheduling. 1–6. 17 indexed citations

Thiele, Daniel, et al.. (2015). Formal timing analysis of CAN-to-Ethernet gateway strategies in automotive networks. Real-Time Systems. 52(1). 88–112. 12 indexed citations

Thiele, Daniel, et al.. (2014). Improving formal timing analysis of switched ethernet by exploiting traffic stream correlations. 1–10. 12 indexed citations

Axer, Philip, Daniel Thiele, Rolf Ernst, & Jonas Diemer. (2014). Exploiting Shaper Context to Improve Performance Bounds of Ethernet AVB Networks. 1–6. 23 indexed citations

10.

Axer, Philip, Daniel Thiele, Rolf Ernst, et al.. (2014). Requirements on Real-Time-Capable Automotive Ethernet Architectures. SAE International journal of passenger cars. Electronic and electrical systems. 7(2). 384–393.

11.

Thiele, Daniel, et al.. (2014). A system-level FPGA design methodology for video applications with weakly-programmable hardware components. Journal of Real-Time Image Processing. 13(2). 291–309. 4 indexed citations

12.

Axer, Philip, Daniel Thiele, & Rolf Ernst. (2014). Formal timing analysis of automatic repeat request for switched real-time networks. 78–87. 8 indexed citations

13.

Thiele, Daniel, et al.. (2013). Improved formal worst-case timing analysis of weighted round robin scheduling for ethernet. 25. 12 indexed citations

14.

Thiele, Daniel, Rolf Ernst, Jonas Diemer, & Kai Richter. (2013). Cooperating on Real-Time Capable Ethernet Architecture in Vehicles. ATZ-Elektronik worldwide. 8(5). 40–44. 1 indexed citations

15.

Thiele, Daniel, et al.. (2013). Improved formal worst-case timing analysis of weighted round robin scheduling for Ethernet. 1–10. 5 indexed citations

16.

Thiele, Daniel & Rolf Ernst. (2012). Optimizing performance analysis for synchronous dataflow graphs with shared resources. Design, Automation, and Test in Europe. 635–640. 5 indexed citations

17.

Diemer, Jonas, Daniel Thiele, & Rolf Ernst. (2012). Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching. 1–10. 75 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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