D. L. Ostapko

457 total citations
15 papers, 328 citations indexed

About

D. L. Ostapko is a scholar working on Electrical and Electronic Engineering, Computational Theory and Mathematics and Hardware and Architecture. According to data from OpenAlex, D. L. Ostapko has authored 15 papers receiving a total of 328 indexed citations (citations by other indexed papers that have themselves been cited), including 10 papers in Electrical and Electronic Engineering, 6 papers in Computational Theory and Mathematics and 5 papers in Hardware and Architecture. Recurrent topics in D. L. Ostapko's work include VLSI and Analog Circuit Testing (4 papers), Low-power high-performance VLSI design (4 papers) and Software Testing and Debugging Techniques (3 papers). D. L. Ostapko is often cited by papers focused on VLSI and Analog Circuit Testing (4 papers), Low-power high-performance VLSI design (4 papers) and Software Testing and Debugging Techniques (3 papers). D. L. Ostapko collaborates with scholars based in United States, Hong Kong and South Korea. D. L. Ostapko's co-authors include S. J. Hong, A. M. Patel, D. C. Bossen, Stephen S. Yau, Sung Je Hong, C. K. Wong, P. Feldmann, Ibrahim M. Elfadel, John A. Darringer and M.S. Schmookler and has published in prestigious journals such as IEEE Transactions on Computers, IBM Journal of Research and Development and ACM SIGPLAN Notices.

In The Last Decade

D. L. Ostapko

14 papers receiving 303 citations

Peers

D. L. Ostapko
M. C. Paull United States
D.L. Dietmeyer United States
A.E.A. Almaini United Kingdom
Seh-Woong Jeong South Korea
P.R. Menon United States
G. Saucier France
Thaddeus J. Kowalski United States
D. C. Bossen United States
M. C. Paull United States
D. L. Ostapko
Citations per year, relative to D. L. Ostapko D. L. Ostapko (= 1×) peers M. C. Paull

Countries citing papers authored by D. L. Ostapko

Since Specialization
Citations

This map shows the geographic impact of D. L. Ostapko's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D. L. Ostapko with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D. L. Ostapko more than expected).

Fields of papers citing papers by D. L. Ostapko

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by D. L. Ostapko. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D. L. Ostapko. The network helps show where D. L. Ostapko may publish in the future.

Co-authorship network of co-authors of D. L. Ostapko

This figure shows the co-authorship network connecting the top 25 collaborators of D. L. Ostapko. A scholar is included among the top collaborators of D. L. Ostapko based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with D. L. Ostapko. D. L. Ostapko is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

15 of 15 papers shown
1.
Bhattacharya, Subhrajit, John A. Darringer, D. L. Ostapko, & Youngsoo Shin. (2005). A Mask Reuse Methodology for Reducing System-on-a-Chip Cost. 482–487. 1 indexed citations
2.
Elfadel, Ibrahim M., et al.. (2004). Are on-chip power-ground planes really needed? A signal integrity perspective. 307–310. 3 indexed citations
3.
Ostapko, D. L., et al.. (2001). On the signal bounding problem in timing analysis. 507–514. 7 indexed citations
4.
Ostapko, D. L., et al.. (1991). Size optimization for CMOS basic cells of VLSI. 7. 2180–2183 vol.4. 2 indexed citations
5.
Ostapko, D. L.. (1984). A mapping and memory chip hardware which provides symmetric reading/writing of horizontal and vertical lines. IBM Journal of Research and Development. 28(4). 393–398. 2 indexed citations
6.
Ostapko, D. L., et al.. (1975). Codes for Self-clocking, AC-coupled Transmission: Aspects of Synthesis and Analysis. IBM Journal of Research and Development. 19(4). 358–365. 12 indexed citations
7.
Ostapko, D. L.. (1974). On deriving a relation between circuits and input/output by analyzing an equivalent program. ACM SIGPLAN Notices. 9(6). 18–24. 3 indexed citations
8.
Ostapko, D. L. & S. J. Hong. (1974). Generating Test Examples for Heuristic Boolean Minimization. IBM Journal of Research and Development. 18(5). 459–464. 4 indexed citations
9.
Hong, S. J., et al.. (1974). MINI: A Heuristic Approach for Logic Minimization. IBM Journal of Research and Development. 18(5). 443–458. 245 indexed citations
10.
Ostapko, D. L.. (1974). Analysis of algorithms implemented in software and hardware. 2. 749–749. 1 indexed citations
11.
Hong, Sung Je & D. L. Ostapko. (1972). On Complementation of Boolean Functions. IEEE Transactions on Computers. C-21(9). 1022–1022. 6 indexed citations
12.
Bossen, D. C., D. L. Ostapko, A. M. Patel, & M.S. Schmookler. (1971). Minimum test patterns for residue networks. 278–284. 1 indexed citations
13.
Ostapko, D. L. & Stephen S. Yau. (1970). Realization of an Arbitrary Switching Function with a Two-Level Network of Threshold and Parity Elements. IEEE Transactions on Computers. C-19(3). 262–269. 3 indexed citations
14.
Bossen, D. C., D. L. Ostapko, & A. M. Patel. (1970). Optimum test patterns for parity networks. 63–63. 35 indexed citations
15.
Yau, Stephen S. & D. L. Ostapko. (1968). Realization of a Class of Switching Functions by Threshold-Logic Networks. IEEE Transactions on Computers. C-17(4). 391–399. 3 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Rankless by CCL
2026