Chetan Vudadha

450 citations

31 papers · 308 indexed · h-index 11

Co-authors: M.B. Srinivas Saurabh Agrawal M. B. Srinivas M. D. Srinivas Syed Ershad Ahmed Sreehari Veeramachaneni Poojan Patel Subhankar Pal
Topics: Low-power high-performance VLSI design (18 papers)Advancements in Semiconductor Devices and Circuit Design (17 papers)Analog and Mixed-Signal Circuit Design (14 papers)
Cited by: Computational Theory and Mathematics Electrical and Electronic Engineering Hardware and Architecture
Journals: IEEE Transactions on Circuits and Systems I Regular Papers IEEE Transactions on Nanotechnology Circuits Systems and Signal Processing
Partner nations: India

In The Last Decade

Chetan Vudadha

28 papers receiving 292 citations

Peers

Countries citing papers authored by Chetan Vudadha

Since Specialization

Citations

This map shows the geographic impact of Chetan Vudadha's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chetan Vudadha with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chetan Vudadha more than expected).

Fields of papers citing papers by Chetan Vudadha

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Chetan Vudadha. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chetan Vudadha. The network helps show where Chetan Vudadha may publish in the future.

Co-authorship network of co-authors of Chetan Vudadha

This figure shows the co-authorship network connecting the top 25 collaborators of Chetan Vudadha. A scholar is included among the top collaborators of Chetan Vudadha based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Chetan Vudadha. Chetan Vudadha is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	Design of CNFET-based Ternary Conditional Sum Adders using Binary Carry Propagation 2024 ·Chetan Vudadha	1
2	An Approximate Full-Adder to Eliminate Carry Propagation in Lower Significant Stage of a Multi-Digit Adder 2023 ·(unknown),Chetan Vudadha,(unknown),(unknown)	2
3	Power efficient designs of CNTFET-based ternary SRAM 2023 ·Microelectronics Journal ·(unknown),(unknown),Chetan Vudadha	5
4	Low Power and High Speed Comparator Design in Quantum-dot Cellular Automata 2023 ·Anas Khan,Chetan Vudadha	1
5	Design of Resource Efficient Binary and Floating Point Comparator Using FPGA Primitive Instantiation 2023 ·Journal of Circuits Systems and Computers ·(unknown),Chetan Vudadha	0
6	Design of CNTFET-based Ternary Logic circuits using Low power Encoder 2022 ·(unknown),(unknown),Chetan Vudadha	3
7	Optimization of Reversible Circuits Using Gate Pair Classification 2021 ·SN Computer Science ·(unknown),Chetan Vudadha,M. B. Srinivas	1
8	Design of CNFET-based Low-Power Ternary Sequential Logic circuits 2021 ·(unknown),Chetan Vudadha	3
9	A Novel Low Power Ternary Multiplier Design using CNFETs 2020 ·(unknown),(unknown),Chetan Vudadha	13
10	Design of CNTFET-Based Ternary ALU Using 2:1 Multiplexer Based Approach 2020 ·IEEE Transactions on Nanotechnology ·(unknown),Chetan Vudadha	35
11	FILA: Fault-Model for Interconnection Links in Application-Specific Network-on-Chip Design 2020 ·(unknown),Chetan Vudadha,J. Soumya	1
12	Design Methodologies for Ternary Logic Circuits 2018 ·Chetan Vudadha,M. D. Srinivas	28
13	Synthesis of Ternary Logic Circuits Using 2:1 Multiplexers 2018 ·IEEE Transactions on Circuits and Systems I Regular Papers ·Chetan Vudadha,(unknown),Saurabh Agrawal,M.B. Srinivas	58
14	A New Design of an N-Bit Reversible Arithmetic Logic Unit 2014 ·Subhankar Pal,Chetan Vudadha,(unknown),Sreehari Veeramachaneni,(unknown)	3
15	An Optimized Design of Reversible Quantum Comparator 2014 ·(unknown),Chetan Vudadha,(unknown),M. B. Srinivas	7
16	Low-Power Self Reconfigurable Multiplexer Based Decoder for Adaptive Resolution Flash ADCs 2012 ·Chetan Vudadha,(unknown),(unknown),(unknown),Syed Ershad Ahmed,Sreehari Veeramachaneni,(unknown),M. B. Srinivas	15
17	CNFET based ternary magnitude comparator 2012 ·Chetan Vudadha,(unknown),(unknown),M. B. Srinivas	21
18	Design of Prefix-Based Optimal Reversible Comparator 2012 ·Chetan Vudadha,(unknown),(unknown),Syed Ershad Ahmed,(unknown),M. B. Srinivas	14
19	Non-linear partitioning for decimal logarithm approximation 2011 ·Chetan Vudadha,Sreehari Veeramachaneni,M. Srinivas	1
20	Increment/decrement/2's complement/priority encoder circuit for varying operand lengths 2011 ·(unknown),Chetan Vudadha,Syed Ershad Ahmed,(unknown),(unknown),M.B. Srinivas	0

About Chetan Vudadha

Chetan Vudadha is a scholar working on Computational Theory and Mathematics, Hardware and Architecture and Electrical and Electronic Engineering, having authored 31 papers that have together received 308 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (18 papers), Advancements in Semiconductor Devices and Circuit Design (17 papers) and Analog and Mixed-Signal Circuit Design (14 papers). The work is most often cited by research in Computational Theory and Mathematics (113 citations), Electrical and Electronic Engineering (277 citations) and Hardware and Architecture (28 citations). Chetan Vudadha has collaborated with scholars based in India. Frequent co-authors include M.B. Srinivas, Saurabh Agrawal, M. B. Srinivas, M. D. Srinivas, Syed Ershad Ahmed, Sreehari Veeramachaneni, Poojan Patel, Subhankar Pal, Anas Khan and M. Srinivas. Their work appears in journals such as IEEE Transactions on Circuits and Systems I Regular Papers, IEEE Transactions on Nanotechnology and Circuits Systems and Signal Processing.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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