Cheng-Xin Xue

2.6k total citations
28 papers, 1.6k citations indexed

About

Cheng-Xin Xue is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Cheng-Xin Xue has authored 28 papers receiving a total of 1.6k indexed citations (citations by other indexed papers that have themselves been cited), including 27 papers in Electrical and Electronic Engineering, 6 papers in Hardware and Architecture and 4 papers in Computer Networks and Communications. Recurrent topics in Cheng-Xin Xue's work include Advanced Memory and Neural Computing (24 papers), Ferroelectric and Negative Capacitance Devices (19 papers) and Semiconductor materials and devices (11 papers). Cheng-Xin Xue is often cited by papers focused on Advanced Memory and Neural Computing (24 papers), Ferroelectric and Negative Capacitance Devices (19 papers) and Semiconductor materials and devices (11 papers). Cheng-Xin Xue collaborates with scholars based in Taiwan, United States and China. Cheng-Xin Xue's co-authors include Meng‐Fan Chang, Kea‐Tiong Tang, Ren-Shuo Liu, Chih-Cheng Hsieh, Je-Min Hung, Wei-Hao Chen, Chuan-Jia Jhang, Fu-Chun Chang, Wei‐Yu Lin and Ya‐Chin King and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, Nature Electronics and IEEE Transactions on Circuits and Systems I Regular Papers.

In The Last Decade

Cheng-Xin Xue

27 papers receiving 1.6k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Cheng-Xin Xue Taiwan 14 1.5k 284 271 184 136 28 1.6k
Zhenhua Zhu China 17 884 0.6× 275 1.0× 180 0.7× 115 0.6× 198 1.5× 63 1.1k
Win-San Khwa Taiwan 27 2.0k 1.3× 364 1.3× 219 0.8× 307 1.7× 242 1.8× 66 2.2k
Yen-Cheng Chiu Taiwan 14 1.0k 0.7× 167 0.6× 191 0.7× 172 0.9× 97 0.7× 20 1.1k
Shanshi Huang United States 15 968 0.6× 230 0.8× 160 0.6× 118 0.6× 126 0.9× 29 1.1k
Shihui Yin United States 17 1.4k 0.9× 385 1.4× 172 0.6× 207 1.1× 232 1.7× 53 1.6k
Yu-Der Chih Taiwan 31 2.2k 1.4× 304 1.1× 242 0.9× 395 2.1× 205 1.5× 80 2.4k
Shyh-Shyuan Sheu Taiwan 24 1.6k 1.0× 157 0.6× 188 0.7× 268 1.5× 51 0.4× 81 1.7k
Ren-Shuo Liu Taiwan 23 2.0k 1.3× 392 1.4× 292 1.1× 415 2.3× 251 1.8× 73 2.4k
Tsung-Yung Jonathan Chang Taiwan 20 1.2k 0.8× 196 0.7× 134 0.5× 276 1.5× 123 0.9× 48 1.4k
Mohammad Reza Mahmoodi United States 16 1.4k 0.9× 263 0.9× 486 1.8× 233 1.3× 95 0.7× 40 1.5k

Countries citing papers authored by Cheng-Xin Xue

Since Specialization
Citations

This map shows the geographic impact of Cheng-Xin Xue's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Cheng-Xin Xue with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Cheng-Xin Xue more than expected).

Fields of papers citing papers by Cheng-Xin Xue

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Cheng-Xin Xue. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Cheng-Xin Xue. The network helps show where Cheng-Xin Xue may publish in the future.

Co-authorship network of co-authors of Cheng-Xin Xue

This figure shows the co-authorship network connecting the top 25 collaborators of Cheng-Xin Xue. A scholar is included among the top collaborators of Cheng-Xin Xue based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Cheng-Xin Xue. Cheng-Xin Xue is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Xue, Cheng-Xin, et al.. (2023). 7.6 A 70.85-86.27TOPS/W PVT-Insensitive 8b Word-Wise ACIM with Post-Processing Relaxation. 136–138. 34 indexed citations
2.
3.
Xue, Cheng-Xin, Je-Min Hung, Hui-Yao Kao, et al.. (2021). 16.1 A 22nm 4Mb 8b-Precision ReRAM Computing-in-Memory Macro with 11.91 to 195.7TOPS/W for Tiny AI Edge Devices. 245–247. 143 indexed citations
4.
Chiu, Yen-Cheng, Tung-Cheng Chang, Chun‐Ying Lee, et al.. (2021). A 22-nm 1-Mb 1024-b Read Data-Protected STT-MRAM Macro With Near-Memory Shift-and-Rotate Functionality and 42.6-GB/s Read Bandwidth for Security-Aware Mobile Device. IEEE Journal of Solid-State Circuits. 57(6). 1936–1949. 9 indexed citations
5.
Hung, Je-Min, Chun‐Ying Lee, Cheng-Xin Xue, et al.. (2021). CiM3D: Comparator-in-Memory Designs Using Monolithic 3-D Technology for Accelerating Data-Intensive Applications. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 7(1). 79–87. 5 indexed citations
6.
Jhang, Chuan-Jia, Cheng-Xin Xue, Je-Min Hung, Fu-Chun Chang, & Meng‐Fan Chang. (2021). Challenges and Trends of SRAM-Based Computing-In-Memory for AI Edge Devices. IEEE Transactions on Circuits and Systems I Regular Papers. 68(5). 1773–1786. 170 indexed citations
7.
Hung, Je-Min, Cheng-Xin Xue, Hui-Yao Kao, et al.. (2021). A four-megabit compute-in-memory macro with eight-bit precision based on CMOS and resistive random-access memory for AI edge devices. Nature Electronics. 4(12). 921–930. 86 indexed citations
8.
Wei, Wei-Chen, Chuan-Jia Jhang, Yiren Chen, et al.. (2020). A Relaxed Quantization Training Method for Hardware Limitations of Resistive Random Access Memory (ReRAM)-Based Computing-in-Memory. IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 6(1). 45–52. 10 indexed citations
9.
Xue, Cheng-Xin, Ting-Wei Chang, Hui-Yao Kao, et al.. (2020). 15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices. 244–246. 180 indexed citations
10.
11.
Liu, Qi, Bin Gao, Peng Yao, et al.. (2020). 33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing. 500–502. 202 indexed citations
12.
Hung, Je-Min, Chun‐Ying Lee, Cheng-Xin Xue, et al.. (2020). Monolithic 3D+-IC Based Massively Parallel Compute-in-Memory Macro for Accelerating Database and Machine Learning Primitives. 28.5.1–28.5.4. 11 indexed citations
13.
Yan, Bonan, Bing Li, Cheng-Xin Xue, et al.. (2019). Resistive Memory‐Based In‐Memory Computing: From Device and Large‐Scale Integration System Perspectives. Advanced Intelligent Systems. 1(7). 72 indexed citations
14.
Xue, Cheng-Xin & Meng‐Fan Chang. (2019). Challenges in Circuit Designs of Nonvolatile-memory based computing-in-memory for AI Edge Devices. 164–165. 5 indexed citations
15.
Xue, Cheng-Xin, Wei-Hao Chen, Jiafang Li, et al.. (2019). Embedded 1-Mb ReRAM-Based Computing-in- Memory Macro With Multibit Input and Weight for CNN-Based AI Edge Processors. IEEE Journal of Solid-State Circuits. 55(1). 203–215. 84 indexed citations
16.
Tang, Kea‐Tiong, Wei-Chen Wei, Tzu-Hsiang Hsu, et al.. (2019). Considerations Of Integrating Computing-In-Memory And Processing-In-Sensor Into Convolutional Neural Network Accelerators For Low-Power Edge Devices. T166–T167. 12 indexed citations
17.
Tang, Kea‐Tiong, Wei-Chen Wei, Tzu-Hsiang Hsu, et al.. (2019). Considerations of Integrating Computing-In-Memory and Processing-In-Sensor into Convolutional Neural Network Accelerators for Low-Power Edge Devices. T166–T167. 17 indexed citations
18.
Chen, Wei-Hao, Kaixiang Li, Wei‐Yu Lin, et al.. (2018). A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors. 494–496. 262 indexed citations
19.
Xue, Cheng-Xin, Wei-Cheng Zhao, Tzu-Hsien Yang, et al.. (2018). A 28mn 320Kb TCAM Macro with Sub-0.8ns Search Time and 3.5+x Improvement in Delay-Area-Energy Product using Split-Controlled Single-Load 14T Cell. 127–128. 3 indexed citations
20.
Dou, Chunmeng, Wenhua Chen, Cheng-Xin Xue, et al.. (2018). Emerging Memory Based Circuits for Beyond von Neumann Applications: Nonvolatile-Logic and Computing-in-Memory. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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