Chauchin Su

840 total citations
80 papers, 651 citations indexed

About

Chauchin Su is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Chauchin Su has authored 80 papers receiving a total of 651 indexed citations (citations by other indexed papers that have themselves been cited), including 70 papers in Electrical and Electronic Engineering, 43 papers in Hardware and Architecture and 28 papers in Biomedical Engineering. Recurrent topics in Chauchin Su's work include VLSI and Analog Circuit Testing (39 papers), Integrated Circuits and Semiconductor Failure Analysis (31 papers) and Analog and Mixed-Signal Circuit Design (21 papers). Chauchin Su is often cited by papers focused on VLSI and Analog Circuit Testing (39 papers), Integrated Circuits and Semiconductor Failure Analysis (31 papers) and Analog and Mixed-Signal Circuit Design (21 papers). Chauchin Su collaborates with scholars based in Taiwan and United States. Chauchin Su's co-authors include Yingchieh Ho, Shyh‐Jye Jou, Yu-Sheng Yang, Shu-Yu Hsu, Chen‐Yi Lee, Hung-Kai Chen, Chung Len Lee, Chang-Yu Chen, T.Y. Lin and Chien‐Nan Jimmy Liu and has published in prestigious journals such as PLoS ONE, Sensors and IEEE Journal of Solid-State Circuits.

In The Last Decade

Chauchin Su

75 papers receiving 614 citations

Peers

Chauchin Su
Maryam Ashouei Netherlands
Rami A. Abdallah United States
Joyce Kwong United States
Xiaoyang Zeng China
Venkata Rajesh Pamula United States
Robson Luiz Moreno Brazil
Harsh Sohal India
Kyung Ki Kim United States
Alonso Morgado Spain
Young-Jae Min South Korea
Maryam Ashouei Netherlands
Chauchin Su
Citations per year, relative to Chauchin Su Chauchin Su (= 1×) peers Maryam Ashouei

Countries citing papers authored by Chauchin Su

Since Specialization
Citations

This map shows the geographic impact of Chauchin Su's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chauchin Su with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chauchin Su more than expected).

Fields of papers citing papers by Chauchin Su

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Chauchin Su. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chauchin Su. The network helps show where Chauchin Su may publish in the future.

Co-authorship network of co-authors of Chauchin Su

This figure shows the co-authorship network connecting the top 25 collaborators of Chauchin Su. A scholar is included among the top collaborators of Chauchin Su based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Chauchin Su. Chauchin Su is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Ho, Yingchieh, et al.. (2012). A 0.09 <formula formulatype="inline"><tex Notation="TeX">$\mu$</tex> </formula>W Low Power Front-End Biopotential Amplifier for Biosignal Recording. IEEE Transactions on Biomedical Circuits and Systems. 6(5). 508–516. 48 indexed citations
2.
Ho, Yingchieh, et al.. (2011). Design of a Subthreshold-Supply Bootstrapped CMOS Inverter Based on an Active Leakage-Current Reduction Technique. IEEE Transactions on Circuits & Systems II Express Briefs. 59(1). 55–59. 24 indexed citations
3.
Su, Chauchin, et al.. (2009). A 1.5V 7.5uW programmable gain amplifier for multiple biomedical signal acquisition. 73–76. 7 indexed citations
4.
Su, Chauchin, et al.. (2008). BIST for Measuring Clock Jitter of Charge-Pump Phase-Locked Loops. IEEE Transactions on Instrumentation and Measurement. 57(2). 276–285. 32 indexed citations
5.
Su, Chauchin, et al.. (2008). A Scalable Digitalized Buffer for Gigabit I/O. IEEE Transactions on Circuits & Systems II Express Briefs. 55(10). 1026–1030. 10 indexed citations
6.
Su, Chauchin, et al.. (2006). A Digital BIST Methodology for Spread Spectrum Clock Generators. 251–254. 2 indexed citations
7.
Su, Chauchin, et al.. (2006). A Digital BIST Methodology for Spread Spectrum Clock Generators. 1. 251–254. 2 indexed citations
8.
Su, Chauchin, et al.. (2004). A digitized LVDS driver with simultaneous switching noise rejection. 240–243. 3 indexed citations
9.
Su, Chauchin, et al.. (2003). A BIST methodology for iterative logic arrays. 1. 411–414. 2 indexed citations
10.
Su, Chauchin, et al.. (2002). Parasitic effect removal for analog measurement in P1149.4 environment. 499–508. 3 indexed citations
11.
Su, Chauchin, et al.. (2002). Configuration free SoC interconnect BIST methodology. 1033–1038. 12 indexed citations
12.
Jou, Shyh‐Jye, et al.. (2002). A parallel event-driven MOS timing simulator on distributed-memory multiprocessors. 1. 574–577. 2 indexed citations
13.
Su, Chauchin, et al.. (2002). Syndrome simulation and syndrome test for unscanned interconnects. 1. 62–67.
14.
Lu, Chih‐Wen, et al.. (2002). Is IDDQ testing not applicable for deep submicron VLSI in year 2011?. 338–343. 4 indexed citations
15.
Lee, Chung Len, et al.. (2000). Behavior-level fault model for the closed-loop operational amplifier. Journal of information science and engineering. 16(5). 751–766. 11 indexed citations
16.
Su, Chauchin, et al.. (2000). All digital built-in delay and crosstalk measurement for on-chip buses. 527–533. 22 indexed citations
17.
Su, Chauchin & Shyh‐Jye Jou. (1999). Decentralized BIST Methodology for System Level Interconnects. Journal of Electronic Testing. 15(3). 255–265. 3 indexed citations
18.
Su, Chauchin, et al.. (1996). Decentralized BIST for 1149.1 and 1149.5 based interconnects. 120–125. 11 indexed citations
19.
Su, Chauchin, et al.. (1995). Impulse response fault model and fault extraction for functional level analog circuit diagnosis. International Conference on Computer Aided Design. 16(5). 631–636. 10 indexed citations
20.
Su, Chauchin. (1991). Computer-aided design of pseudoexhaustive test for data paths. 69(2). 239–61. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Breakdown of academic impact, for papers by Maryam Ashouei Breakdown of academic impact, for papers by Rami A. Abdallah Breakdown of academic impact, for papers by Joyce Kwong Breakdown of academic impact, for papers by Xiaoyang Zeng Breakdown of academic impact, for papers by Venkata Rajesh Pamula Breakdown of academic impact, for papers by Robson Luiz Moreno Breakdown of academic impact, for papers by Harsh Sohal Breakdown of academic impact, for papers by Kyung Ki Kim Breakdown of academic impact, for papers by Alonso Morgado Breakdown of academic impact, for papers by Young-Jae Min
Rankless by CCL
2026