Biresh Kumar Joardar
- Electrical and Electronic Engineering
- Artificial Intelligence top 10%
- Computer Networks and Communications top 10%
- Hardware and Architecture top 5%
- Computer Vision and Pattern Recognition top 10%
- Co-authors
- Partha Pratim PandeJanardhan Rao DoppaKrishnendu ChakrabartyHai LiRyan KimRadu MărculescuDiana MarculescuAryan Deshwal
- Topics
- Advanced Memory and Neural Computing (24 papers)Ferroelectric and Negative Capacitance Devices (17 papers)Interconnection Networks and Systems (12 papers)
- Cited by
- Hardware and ArchitectureComputer Networks and CommunicationsElectrical and Electronic Engineering
- Journals
- IEEE Transactions on ComputersIEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsIEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Partner nations
- United StatesIndia
In The Last Decade
Biresh Kumar Joardar
36 papers receiving 324 citations
Peers
Comparison fields: 5 of 35
- Electrical and Electronic Engineering 230
- Artificial Intelligence 103
- Computer Networks and Communications 101
- Hardware and Architecture 89
- Computer Vision and Pattern Recognition 80
Countries citing papers authored by Biresh Kumar Joardar
This map shows the geographic impact of Biresh Kumar Joardar's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Biresh Kumar Joardar with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Biresh Kumar Joardar more than expected).
Fields of papers citing papers by Biresh Kumar Joardar
This network shows the impact of papers produced by Biresh Kumar Joardar. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Biresh Kumar Joardar. The network helps show where Biresh Kumar Joardar may publish in the future.
Co-authorship network of co-authors of Biresh Kumar Joardar
This figure shows the co-authorship network connecting the top 25 collaborators of Biresh Kumar Joardar. A scholar is included among the top collaborators of Biresh Kumar Joardar based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Biresh Kumar Joardar. Biresh Kumar Joardar is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 0 | |
| 2 | 2 | |
| 3 | 4 | |
| 4 | 1 | |
| 5 | 2 | |
| 6 | 2 | |
| 7 | 1 | |
| 8 | 8 | |
| 9 | 31 | |
| 10 | 6 | |
| 11 | 14 | |
| 12 | 38 | |
| 13 | 11 | |
| 14 | 13 | |
| 15 | 3 | |
| 16 | 8 | |
| 17 | 1 | |
| 18 | 9 | |
| 19 | 14 | |
| 20 | 15 |
About Biresh Kumar Joardar
Biresh Kumar Joardar is a scholar working on Hardware and Architecture, Computer Networks and Communications and Computer Vision and Pattern Recognition, having authored 39 papers that have together received 332 indexed citations. Recurring topics across this work include Advanced Memory and Neural Computing (24 papers), Ferroelectric and Negative Capacitance Devices (17 papers) and Interconnection Networks and Systems (12 papers). The work is most often cited by research in Hardware and Architecture (89 citations), Computer Networks and Communications (101 citations) and Electrical and Electronic Engineering (230 citations). Biresh Kumar Joardar has collaborated with scholars based in United States and India. Frequent co-authors include Partha Pratim Pande, Janardhan Rao Doppa, Krishnendu Chakrabarty, Hai Li, Ryan Kim, Radu Mărculescu, Diana Marculescu, Aryan Deshwal, Tyler Bletsch and Huanrui Yang. Their work appears in journals such as IEEE Transactions on Computers, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.