B S Kariyappa

838 total citations · 1 hit paper
35 papers, 578 citations indexed

About

B S Kariyappa is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Control and Systems Engineering. According to data from OpenAlex, B S Kariyappa has authored 35 papers receiving a total of 578 indexed citations (citations by other indexed papers that have themselves been cited), including 30 papers in Electrical and Electronic Engineering, 12 papers in Hardware and Architecture and 6 papers in Control and Systems Engineering. Recurrent topics in B S Kariyappa's work include Advancements in Semiconductor Devices and Circuit Design (11 papers), VLSI and Analog Circuit Testing (10 papers) and Low-power high-performance VLSI design (10 papers). B S Kariyappa is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (11 papers), VLSI and Analog Circuit Testing (10 papers) and Low-power high-performance VLSI design (10 papers). B S Kariyappa collaborates with scholars based in India. B S Kariyappa's co-authors include D. Binu, R. Aravind, Roshan M. D’Souza, Arvind Kumar Gupta, R. Nagaraj, S. Prasad, V. Prema, K. Uma Rao, Nikhil Bharat and Abhishek Singh and has published in prestigious journals such as IEEE Transactions on Industrial Electronics, IEEE Transactions on Instrumentation and Measurement and AEU - International Journal of Electronics and Communications.

In The Last Decade

B S Kariyappa

28 papers receiving 503 citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

RideNN: A New Rider Optimization Algorithm-Based Neural Network for Fault Diagnosis in Analog Circuits

2018 260 citations D. Binu, B S Kariyappa profile →

Peers

B S Kariyappa

EEE

HA

AI

CSE

CNC

Minas Dasygenis Greece

Tinghuan Chen China

José Simó Spain

Christian Schlegel Germany

Damian Grzechca Poland

Xi Jin China

Mohamad Khairi Ishak Malaysia

Kasem Khalil United States

Mihai T. Lazarescu Italy

Minas Dasygenis Greece

B S Kariyappa

98 ×0.4

EEE

56 ×0.4

HA

142 ×1.2

AI

44 ×0.5

CSE

89 ×1.1

CNC

Citations per year, relative to B S Kariyappa B S Kariyappa (= 1×) peers Minas Dasygenis

Countries citing papers authored by B S Kariyappa

Since Specialization

Citations

This map shows the geographic impact of B S Kariyappa's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by B S Kariyappa with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites B S Kariyappa more than expected).

Fields of papers citing papers by B S Kariyappa

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by B S Kariyappa. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by B S Kariyappa. The network helps show where B S Kariyappa may publish in the future.

Co-authorship network of co-authors of B S Kariyappa

This figure shows the co-authorship network connecting the top 25 collaborators of B S Kariyappa. A scholar is included among the top collaborators of B S Kariyappa based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with B S Kariyappa. B S Kariyappa is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

1.

Singh, Abhishek & B S Kariyappa. (2023). Physical Design Implementation of SoC Module with Performance Optimization. 1–7.

2.

Kariyappa, B S, et al.. (2023). Design Scalability and Power Optimization of Power Management Unit. 1–6.

3.

Kariyappa, B S, et al.. (2022). Node Voltage and KCL Model-Based Low Leakage Volatile and Non-Volatile 7T SRAM Cells. IETE Journal of Research. 69(10). 7227–7243. 3 indexed citations

4.

Kariyappa, B S, et al.. (2021). Design, Implementation and Performance Analysis of Test Pattern Generator for Built-In Self-Test using m-GDI Technology. Indian Journal of Science and Technology. 15(5). 221–226. 2 indexed citations

5.

Kariyappa, B S, et al.. (2021). Modeling and Simulation of Battery Management System (BMS) for Electric Vehicles. Journal of University of Shanghai for Science and Technology. 23(6). 805–815. 3 indexed citations

6.

Kariyappa, B S, et al.. (2021). Design and Performance Analysis of Active and Passive Cell Balancing for Lithium-Ion Batteries. Journal of University of Shanghai for Science and Technology. 23(6). 476–488.

7.

Kariyappa, B S, et al.. (2020). A NOVEL APPROACH FOR POWER OPTIMIZATION IN SEQUENTIAL CIRCUITS USING LATCH BASED CLOCK GATING. SSRN Electronic Journal. 11(4). 1 indexed citations

8.

Binu, D. & B S Kariyappa. (2020). Rider-Deep-LSTM Network for Hybrid Distance Score-Based Fault Prediction in Analog Circuits. IEEE Transactions on Industrial Electronics. 68(10). 10097–10106. 67 indexed citations

9.

Binu, D. & B S Kariyappa. (2020). Multi-Rider Optimization-Based Neural Network for Fault Isolation in Analog Circuits. Journal of Circuits Systems and Computers. 30(3). 2150048–2150048. 2 indexed citations

10.

Kariyappa, B S, et al.. (2019). Integration and Verification of Physical Layer Modules for 5G Technology. 2019 3rd International conference on Electronics, Communication and Aerospace Technology (ICECA). 3 indexed citations

11.

Kariyappa, B S, et al.. (2018). Static Low-Power 17T True Single Phase Clocking Flip-Flop Based on Logic Structure Optimization. e82 c. 680–685. 1 indexed citations

12.

Kariyappa, B S, et al.. (2016). Parametric analysis of amorphous silicon thin film transistors. 1642–1646.

13.

Kariyappa, B S, et al.. (2016). Design and optimization of 8 bit ALU using reversible logic. 1632–1636. 13 indexed citations

14.

Prema, V., et al.. (2015). Effective battery usage strategies for hybrid power management. 2. 95–98. 1 indexed citations

15.

Aravind, R., et al.. (2015). Design and development of automatic weed detection and smart herbicide sprayer robot. 257–261. 41 indexed citations

16.

Kariyappa, B S, et al.. (2014). Design and Implementation of Flash ADC for Low Power Applications. IOSR Journal of VLSI and Signal processing. 4(6). 41–46. 1 indexed citations

17.

Bharat, Nikhil, et al.. (2014). Pattern Recognition Using Video Surveillance for Wildlife Applications. SSRN Electronic Journal. 1 indexed citations

18.

Kariyappa, B S, et al.. (2009). Position Control of an AC Servo Motor Using VHDL and FPGA. World Academy of Science, Engineering and Technology, International Journal of Computer, Electrical, Automation, Control and Information Engineering. 3(1). 150–153. 1 indexed citations

19.

Prasad, S., et al.. (2009). Micro Controller Based Ac Power Controller. Wireless Sensor Network. 1(2). 76–81. 2 indexed citations

20.

Prasad, S., et al.. (2008). A novel technique of AC power control using micro controller based inverter. ie 32. 2713–2716. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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