A. Aziz

594 total citations
30 papers, 363 citations indexed

About

A. Aziz is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computational Theory and Mathematics. According to data from OpenAlex, A. Aziz has authored 30 papers receiving a total of 363 indexed citations (citations by other indexed papers that have themselves been cited), including 16 papers in Electrical and Electronic Engineering, 14 papers in Hardware and Architecture and 12 papers in Computational Theory and Mathematics. Recurrent topics in A. Aziz's work include Formal Methods in Verification (12 papers), VLSI and Analog Circuit Testing (8 papers) and Low-power high-performance VLSI design (8 papers). A. Aziz is often cited by papers focused on Formal Methods in Verification (12 papers), VLSI and Analog Circuit Testing (8 papers) and Low-power high-performance VLSI design (8 papers). A. Aziz collaborates with scholars based in United States, Switzerland and Malaysia. A. Aziz's co-authors include Carl Pixley, Amit Prakash, Robert K. Brayton, Santosh Kumar Gupta, Martin D. F. Wong, Hai Zhou, Jianmin Yuan, J.L. Burns, Alberto Sangiovanni‐Vincentelli and Felice Balarin and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Indian Journal of Public Health Research & Development and International Conference on Computer Aided Design.

In The Last Decade

A. Aziz

29 papers receiving 341 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
A. Aziz United States 11 204 189 152 115 70 30 363
Sorin Manolache Sweden 12 296 1.5× 65 0.3× 98 0.6× 192 1.7× 12 0.2× 14 366
A. Mishchenko United States 13 280 1.4× 300 1.6× 259 1.7× 28 0.2× 61 0.9× 27 462
Derek L. Beatty United States 7 332 1.6× 189 1.0× 263 1.7× 37 0.3× 114 1.6× 11 453
Thomas J. Sheffler United States 5 214 1.0× 135 0.7× 63 0.4× 65 0.6× 22 0.3× 13 262
Éric Jenn France 6 236 1.2× 219 1.2× 34 0.2× 65 0.6× 95 1.4× 13 326
Michal Rimon Israel 7 198 1.0× 89 0.5× 103 0.7× 28 0.2× 134 1.9× 16 291
Victor Khomenko United Kingdom 11 201 1.0× 138 0.7× 215 1.4× 54 0.5× 42 0.6× 59 349
Wolfgang Roesner Germany 9 141 0.7× 144 0.8× 58 0.4× 31 0.3× 44 0.6× 16 238
Deepak A. Mathaikutty United States 9 187 0.9× 61 0.3× 62 0.4× 71 0.6× 67 1.0× 46 246
Matthew Lewis Germany 7 84 0.4× 69 0.4× 93 0.6× 67 0.6× 55 0.8× 20 195

Countries citing papers authored by A. Aziz

Since Specialization
Citations

This map shows the geographic impact of A. Aziz's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by A. Aziz with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites A. Aziz more than expected).

Fields of papers citing papers by A. Aziz

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by A. Aziz. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by A. Aziz. The network helps show where A. Aziz may publish in the future.

Co-authorship network of co-authors of A. Aziz

This figure shows the co-authorship network connecting the top 25 collaborators of A. Aziz. A scholar is included among the top collaborators of A. Aziz based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with A. Aziz. A. Aziz is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Aziz, A.. (2020). Designe An Electrical System for Adjustable Hearing Aid Based on Smartphone. Indian Journal of Public Health Research & Development. 11(10). 310–316. 1 indexed citations
2.
Goel, Anuj Kumar, et al.. (2007). BDD Based Procedures for a Theory of Equality with Uninterpreted Functions. 1 indexed citations
3.
Wu, Xiang, Amit Prakash, Marghoob Mohiyuddin, & A. Aziz. (2006). Scheduling Traffic Matrices On General Switch Fabrics. 87–92. 3 indexed citations
4.
Zaraket, Fadi A., et al.. (2005). Scalable compositional minimization via static analysis. International Conference on Computer Aided Design. 1060–1067. 4 indexed citations
5.
Zaraket, Fadi A., et al.. (2005). Scalable compositional minimization via static analysis. 1060–1067. 3 indexed citations
6.
Panigrahy‎, Rina, et al.. (2004). Weighted random matching: a simple scheduling algorithm for achieving 100% throughput. 111–115. 2 indexed citations
7.
Aziz, A., et al.. (2003). An efficient buffer insertion algorithm for large networks based on Lagrangian relaxation. 210–215. 19 indexed citations
8.
Prakash, Amit, et al.. (2003). A high-performance architecture and BDD-based synthesis methodology for packet classification. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 22(6). 698–709. 10 indexed citations
9.
Yuan, Jianmin, et al.. (2003). Modeling design constraints and biasing in simulation using BDDs. 584–589. 39 indexed citations
10.
Prakash, Amit, et al.. (2003). An O(log/sup 2/ N) parallel algorithm for output queuing. 3. 1623–1629. 10 indexed citations
11.
Prakash, Amit & A. Aziz. (2002). OC-3072 packet classification using BDDs and pipelined SRAMs. 1997. 15–20. 7 indexed citations
12.
13.
Aziz, A., et al.. (2002). Area-oriented synthesis for pass-transistor logic. e78 c. 160–167. 17 indexed citations
14.
Chou, Tan‐Li, et al.. (2001). Zero-skew clock tree construction by simultaneous routing, wire sizing and buffer insertion. International Conference on Computer Aided Design. 33–38. 1 indexed citations
15.
Zhou, Haijun & A. Aziz. (2001). Buffer minimization in pass transistor logic. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 20(5). 693–697. 4 indexed citations
16.
Pixley, Carl, et al.. (2001). Theory of safe replacements for sequential circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 20(2). 249–265. 12 indexed citations
17.
Zhou, Hai, et al.. (2000). Simultaneous routing and buffer insertion with restrictions on buffer locations. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 19(7). 819–824. 40 indexed citations
18.
Zhou, Hai & A. Aziz. (2000). Buffer minimization in pass transistor logic. International Conference on Computer Aided Design. 105–110. 1 indexed citations
19.
Ganai, Malay, et al.. (1999). Performance driven synthesis for pass-transistor logic. 372–377. 14 indexed citations
20.
Mehrotra, A., et al.. (1997). Sequential optimisation without state space exploration. International Conference on Computer Aided Design. 208–215. 4 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Rankless by CCL
2026