Citation Impact
Citing Papers
Quantum Fingerprinting
2001 Standout
Binary Decision Diagrams
1978
The capacity of low-density parity-check codes under message-passing decoding
2001 Standout
VLSI Test Principles and Architectures: Design for Testability
2006
Survey of Test Vector Compression Techniques
2006 Standout
Near-optimum decoding of product codes: block turbo codes
1998
Symbolic Boolean manipulation with ordered binary-decision diagrams
1992 Standout
Networks on chips: a new SoC paradigm
2002 Standout
Factor graphs and the sum-product algorithm
2001 Standout
Class of constructive asymptotically good algebraic codes
1972
Toward achieving energy efficiency in presence of deep submicron noise
2000
Concurrent application of compaction and compression for test time and data volume reduction in scan designs
2003
Survey on Free Space Optical Communication: A Communication Theory Perspective
2014 Standout
Self-Testing Computers
1979
Variable-length input huffman coding for system-on-a-chip test
2003
Graph-Based Algorithms for Boolean Function Manipulation
1986 Standout
Good error-correcting codes based on very sparse matrices
1999 Standout
Built-In Self-Test Techniques
1985 Standout
Design of capacity-approaching irregular low-density parity-check codes
2001 Standout
A recursive approach to low complexity codes
1981 Standout
Works of S.M. Reddy being referenced
On the fault coverage of gate delay fault detecting tests
1997
Complete Test Sets for Logic Functions
1973
Error-Control Techniques for Logic Processors
1972
On Delay Fault Testing in Logic Circuits
1987
Compact test sets for high defect coverage
1997
COMPACTEST: a method to generate compact test sets for combinational circuits
1993
On decoding iterated codes
1970
On correction of multiple design errors
1995
Static Test Compaction for Scan-Based Designs to Reduce Test Application Time
2000
Random error and burst correction by iterated codes
1972
Finite memory test response compactors for embedded test applications
2005
On the Design of Logic Networks with Redundancy and Testability Considerations
1974
On path selection in combinational logic circuits
1989