M.P. Baze

Hardness assurance for low-dose space applications (MOS devices)

Radiation-induced soft errors in advanced semiconductor technologies

Basic mechanisms and modeling of single-event upset in digital microelectronics

New insights into radiation-induced oxide-trap charge through thermally-stimulated-current measurement and analysis (MOS capacitors)

Total ionizing dose effects in MOS oxides and devices

Cost reduction and evaluation of a temporary faults detecting technique

Long-term annealing study of midgap interface-trap charge neutrality

Analysis of single-event effects in combinational logic-simulation of the AM2901 bitslice processor

Heavy ion-induced digital single-event transients in deep submicron Processes

Effect of bias on thermally stimulated current (TSC) in irradiated MOS devices

Single particle-induced latchup

Response of interface traps during high-temperature anneals (MOSFETs)

Impact of scaling on soft-error rates in commercial microprocessors

Radiation Effects in MOS Oxides

Destructive single-event effects in semiconductor devices and ICs

SEU-sensitive volumes in bulk and SOI SRAMs from first-principles calculations and experiments

Latchup Paths in Bipolar Integrated Circuits

A digital CMOS design technique for SEU hardening

A comparison of methods for total dose testing of bulk CMOS and CMOS/SOS devices

Mechanisms for the Latchup Window Effect in Integrated Circuits

Comparison of error rates in combinational and sequential logic

Experimental Methods for Determining Latchup Paths in Integrated Circuits

Attenuation of single event induced pulses in CMOS combinational logic

A distributed model for radiation-induced latchup

The effect of circuit topology on radiation-induced latchup

The effect of temperature on single-particle latchup