Zeshan Chishti

3.0k total citations
40 papers, 2.1k citations indexed

About

Zeshan Chishti is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering. According to data from OpenAlex, Zeshan Chishti has authored 40 papers receiving a total of 2.1k indexed citations (citations by other indexed papers that have themselves been cited), including 33 papers in Hardware and Architecture, 26 papers in Computer Networks and Communications and 19 papers in Electrical and Electronic Engineering. Recurrent topics in Zeshan Chishti's work include Parallel Computing and Optimization Techniques (33 papers), Advanced Data Storage Technologies (21 papers) and Low-power high-performance VLSI design (14 papers). Zeshan Chishti is often cited by papers focused on Parallel Computing and Optimization Techniques (33 papers), Advanced Data Storage Technologies (21 papers) and Low-power high-performance VLSI design (14 papers). Zeshan Chishti collaborates with scholars based in United States, Canada and United Kingdom. Zeshan Chishti's co-authors include Chris Wilkerson, T. N. Vijaykumar, Shih‐Lien Lu, Michael D. Powell, Alaa R. Alameldeen, Wei Wu, Seth H. Pugsley, Bruce Jacob, Muhammad Khellah and Hongliang Gao and has published in prestigious journals such as IEEE Transactions on Computers, ACM SIGPLAN Notices and IEEE Micro.

In The Last Decade

Zeshan Chishti

40 papers receiving 2.0k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Zeshan Chishti United States 21 1.6k 1.3k 1.1k 203 158 40 2.1k
Wim Heirman Belgium 15 1.2k 0.7× 958 0.7× 541 0.5× 175 0.9× 103 0.7× 66 1.4k
Nuwan Jayasena United States 18 1.2k 0.7× 1.1k 0.8× 417 0.4× 238 1.2× 127 0.8× 33 1.5k
Matteo Monchiero Italy 16 936 0.6× 926 0.7× 1.1k 1.0× 138 0.7× 154 1.0× 34 1.8k
Sangyeun Cho United States 22 1.7k 1.0× 2.1k 1.6× 672 0.6× 621 3.1× 164 1.0× 88 2.5k
Simon C. Steely United States 14 1.8k 1.1× 1.9k 1.4× 398 0.4× 534 2.6× 180 1.1× 26 2.1k
Paul Rosenfeld United States 8 870 0.5× 807 0.6× 430 0.4× 159 0.8× 142 0.9× 12 1.2k
Ali Bakhoda Canada 5 1.3k 0.8× 1.2k 0.9× 355 0.3× 236 1.2× 94 0.6× 9 1.5k
Elliott Cooper-Balis United States 7 801 0.5× 732 0.5× 369 0.3× 150 0.7× 120 0.8× 7 1.0k
Eiman Ebrahimi United States 23 1.4k 0.8× 1.4k 1.0× 448 0.4× 460 2.3× 172 1.1× 29 1.8k
Trevor E. Carlson Singapore 16 1.2k 0.7× 1.0k 0.7× 546 0.5× 199 1.0× 150 0.9× 75 1.5k

Countries citing papers authored by Zeshan Chishti

Since Specialization
Citations

This map shows the geographic impact of Zeshan Chishti's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Zeshan Chishti with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Zeshan Chishti more than expected).

Fields of papers citing papers by Zeshan Chishti

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Zeshan Chishti. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Zeshan Chishti. The network helps show where Zeshan Chishti may publish in the future.

Co-authorship network of co-authors of Zeshan Chishti

This figure shows the co-authorship network connecting the top 25 collaborators of Zeshan Chishti. A scholar is included among the top collaborators of Zeshan Chishti based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Zeshan Chishti. Zeshan Chishti is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Giannoula, Christina, et al.. (2023). Architectural Support for Efficient Data Movement in Fully Disaggregated Systems. 5–6. 1 indexed citations
2.
Xie, Xinfeng, et al.. (2020). SAGA-Bench: Software and Hardware Characterization of Streaming Graph Analytics Workloads. Rare & Special e-Zone (The Hong Kong University of Science and Technology). 12–23. 7 indexed citations
3.
Chishti, Zeshan & Berkin Akin. (2019). Memory system characterization of deep learning workloads. 497–505. 13 indexed citations
4.
Kotra, Jagadish, et al.. (2017). Hardware-Software Co-design to Mitigate DRAM Refresh Overheads. ACM SIGOPS Operating Systems Review. 51(2). 723–736. 1 indexed citations
5.
Kotra, Jagadish, et al.. (2017). Hardware-Software Co-design to Mitigate DRAM Refresh Overheads. ACM SIGPLAN Notices. 52(4). 723–736. 7 indexed citations
6.
Kim, Jinchun, Seth H. Pugsley, Paul V. Gratz, et al.. (2016). Path confidence based lookahead prefetching. International Symposium on Microarchitecture. 1–12. 45 indexed citations
7.
Chishti, Zeshan, et al.. (2016). The Case for Associative DRAM Caches. 211–219. 1 indexed citations
8.
Chishti, Zeshan, et al.. (2015). Flexible auto-refresh. ACM SIGARCH Computer Architecture News. 43(3S). 235–246. 7 indexed citations
9.
Chishti, Zeshan, et al.. (2015). Bringing Modern Hierarchical Memory Systems Into Focus. 179–190. 1 indexed citations
10.
Shevgoor, Manjunath, et al.. (2015). Efficiently prefetching complex address patterns. 141–152. 120 indexed citations
11.
Chishti, Zeshan, et al.. (2013). Coordinated refresh: Energy efficient techniques for DRAM refresh scheduling. 205–210. 13 indexed citations
12.
Qureshi, Moinuddin K. & Zeshan Chishti. (2013). Operating SECDED-based caches at ultra-low voltage with FLAIR. 1–11. 27 indexed citations
13.
Alameldeen, Alaa R., Ilya Wagner, Zeshan Chishti, et al.. (2011). Energy-efficient cache design using variable-strength error-correcting codes. 461–472. 114 indexed citations
14.
Wilkerson, Chris, Alaa R. Alameldeen, Zeshan Chishti, et al.. (2010). Reducing cache power with low-cost, multi-bit error-correcting codes. ACM SIGARCH Computer Architecture News. 38(3). 83–93. 44 indexed citations
15.
Wilkerson, Chris, Hongliang Gao, Alaa R. Alameldeen, et al.. (2009). Trading Off Cache Capacity for Low-Voltage Operation. IEEE Micro. 29(1). 96–103. 7 indexed citations
16.
Wilkerson, Chris, et al.. (2008). Trading off Cache Capacity for Reliability to Enable Low Voltage Operation. ACM SIGARCH Computer Architecture News. 36(3). 203–214. 34 indexed citations
17.
Wilkerson, Chris, Hongliang Gao, Alaa R. Alameldeen, et al.. (2008). Trading off Cache Capacity for Reliability to Enable Low Voltage Operation. Journal of International Crisis and Risk Communication Research. 203–214. 198 indexed citations
18.
Chishti, Zeshan, Michael D. Powell, & T. N. Vijaykumar. (2005). Optimizing Replication, Communication, and Capacity Allocation in CMPs. 357–368. 137 indexed citations
19.
Chishti, Zeshan & T. N. Vijaykumar. (2004). Wire delay is not a problem for SMT (in the near future). 40–51. 6 indexed citations
20.
Chishti, Zeshan, Michael D. Powell, & T. N. Vijaykumar. (2003). Distance associativity for high-performance energy-efficient non-uniform cache architectures. International Symposium on Microarchitecture. 55–66. 127 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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