Win Chaivipas

659 total citations
14 papers, 481 citations indexed

About

Win Chaivipas is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, Win Chaivipas has authored 14 papers receiving a total of 481 indexed citations (citations by other indexed papers that have themselves been cited), including 14 papers in Electrical and Electronic Engineering, 4 papers in Biomedical Engineering and 1 paper in Hardware and Architecture. Recurrent topics in Win Chaivipas's work include Advancements in PLL and VCO Technologies (13 papers), Radio Frequency Integrated Circuit Design (8 papers) and Photonic and Optical Devices (4 papers). Win Chaivipas is often cited by papers focused on Advancements in PLL and VCO Technologies (13 papers), Radio Frequency Integrated Circuit Design (8 papers) and Photonic and Optical Devices (4 papers). Win Chaivipas collaborates with scholars based in Japan and United States. Win Chaivipas's co-authors include Kenichi Okada, Rui Murakami, Takahiro Sato, Ahmed Musa, Akira Matsuzawa, Keigo Bunsen, Ryo Minami, Hiroki Asada, Akira Matsuzawa and Takahiro Sato and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEICE Transactions on Electronics and IEICE Technical Report; IEICE Tech. Rep..

In The Last Decade

Win Chaivipas

13 papers receiving 474 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Win Chaivipas Japan 8 475 59 22 22 13 14 481
H. Veenstra Netherlands 13 374 0.8× 96 1.6× 10 0.5× 25 1.1× 9 0.7× 34 381
Zheng Sun Japan 11 396 0.8× 135 2.3× 20 0.9× 13 0.6× 18 1.4× 47 418
Rui Murakami Japan 9 511 1.1× 56 0.9× 27 1.2× 22 1.0× 16 1.2× 14 516
E. Bergeault France 12 404 0.9× 62 1.1× 8 0.4× 31 1.4× 13 1.0× 54 410
Z. Ru Netherlands 8 519 1.1× 156 2.6× 13 0.6× 19 0.9× 33 2.5× 10 529
Shita Guo United States 11 324 0.7× 56 0.9× 13 0.6× 8 0.4× 14 1.1× 19 328
Cristian Marcu United States 6 473 1.0× 46 0.8× 11 0.5× 45 2.0× 28 2.2× 7 488
Keigo Bunsen Japan 10 474 1.0× 56 0.9× 28 1.3× 28 1.3× 14 1.1× 14 481
J. Fenk Germany 12 457 1.0× 139 2.4× 32 1.5× 10 0.5× 26 2.0× 40 464

Countries citing papers authored by Win Chaivipas

Since Specialization
Citations

This map shows the geographic impact of Win Chaivipas's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Win Chaivipas with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Win Chaivipas more than expected).

Fields of papers citing papers by Win Chaivipas

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Win Chaivipas. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Win Chaivipas. The network helps show where Win Chaivipas may publish in the future.

Co-authorship network of co-authors of Win Chaivipas

This figure shows the co-authorship network connecting the top 25 collaborators of Win Chaivipas. A scholar is included among the top collaborators of Win Chaivipas based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Win Chaivipas. Win Chaivipas is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

14 of 14 papers shown
1.
Shibasaki, Takayuki, Win Chaivipas, Yanfei Chen, et al.. (2014). A 56-Gb/s receiver front-end with a CTLE and 1-tap DFE in 20-nm CMOS. 1–2. 29 indexed citations
2.
Shibasaki, Takayuki, Win Chaivipas, Yoichi Koyanagi, et al.. (2013). 32 Gb/s Data-Interpolator Receiver with 2-tap DFE in 28-nm CMOS. IEICE Technical Report; IEICE Tech. Rep.. 113(112). 19–24. 4 indexed citations
3.
Doi, Yoshiyuki, Takayuki Shibasaki, Win Chaivipas, et al.. (2013). 32Gb/s data-interpolator receiver with 2-tap DFE in 28nm CMOS. 36–37. 12 indexed citations
4.
Shibasaki, Takayuki, Win Chaivipas, Yoichi Koyanagi, et al.. (2013). A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process. IEEE Journal of Solid-State Circuits. 48(12). 3258–3267. 8 indexed citations
5.
Okada, Kenichi, Keigo Bunsen, Rui Murakami, et al.. (2011). A 60-GHz 16QAM/8PSK/QPSK/BPSK Direct-Conversion Transceiver for IEEE802.15.3c. IEEE Journal of Solid-State Circuits. 46(12). 2988–3004. 147 indexed citations
6.
Okada, Kenichi, Kota Matsushita, Keigo Bunsen, et al.. (2011). A 60GHz 16QAM/8PSK/QPSK/BPSK direct-conversion transceiver for IEEE 802.15.3c. 160–162. 154 indexed citations
7.
Musa, Ahmed, Rui Murakami, Takahiro Sato, et al.. (2011). A 58–63.6GHz quadrature PLL frequency synthesizer using dual-injection technique. 55. 101–102. 1 indexed citations
8.
Musa, Ahmed, Rui Murakami, Takahiro Sato, et al.. (2011). A Low Phase Noise Quadrature Injection Locked Frequency Synthesizer for MM-Wave Applications. IEEE Journal of Solid-State Circuits. 46(11). 2635–2649. 96 indexed citations
9.
Chaivipas, Win, Kenichi Okada, & Akira Matsuzawa. (2008). A 80GHz voltage controlled oscillator utilizing a negative varactor in 90nm CMOS technology. 133–136. 6 indexed citations
10.
Li, Ning, Win Chaivipas, K. Okada, & Akira Matsuzawa. (2008). Analysis of CMOS Transconductance Amplifiers for Sampling Mixers. IEICE Transactions on Electronics. E91-C(6). 871–878. 2 indexed citations
11.
Ito, Takeshi, Win Chaivipas, Kenichi Okada, & Akira Matsuzawa. (2007). Dynamic Reconfigurable Si CMOS VCO Using a Transmission-Line Resonator with PMOS-Bias and PMOS-Crosscouple Topology. 621. 1–4.
12.
Chaivipas, Win & Akira Matsuzawa. (2007). Analysis and Design of Direct Reference Feed-Forward Compensation for Fast-Settling All-Digital Phase-Locked Loop. IEICE Transactions on Electronics. E90-C(4). 793–801. 6 indexed citations
13.
14.
Chaivipas, Win, et al.. (2006). Feedforward compensation technique for all digital phase locked loop based synthesizers. 4–4. 8 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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