Vidyasagar Nookala

653 total citations
9 papers, 460 citations indexed

About

Vidyasagar Nookala is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Vidyasagar Nookala has authored 9 papers receiving a total of 460 indexed citations (citations by other indexed papers that have themselves been cited), including 7 papers in Electrical and Electronic Engineering, 3 papers in Hardware and Architecture and 2 papers in Computer Networks and Communications. Recurrent topics in Vidyasagar Nookala's work include Low-power high-performance VLSI design (7 papers), VLSI and FPGA Design Techniques (7 papers) and Interconnection Networks and Systems (2 papers). Vidyasagar Nookala is often cited by papers focused on Low-power high-performance VLSI design (7 papers), VLSI and FPGA Design Techniques (7 papers) and Interconnection Networks and Systems (2 papers). Vidyasagar Nookala collaborates with scholars based in United States. Vidyasagar Nookala's co-authors include Sachin S. Sapatnekar, Zhi‐Quan Luo, Jaskirat Singh, David J. Lilja and Ying Chen and has published in prestigious journals such as Design Automation Conference.

In The Last Decade

Vidyasagar Nookala

9 papers receiving 447 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Vidyasagar Nookala United States	7	321	225	128	44	27	9	460
F.J. Meyer United States	12	408 1.3×	373 1.7×	215 1.7×	39 0.9×	34 1.3×	56	607
Karthik Chandrasekar Netherlands	11	209 0.7×	225 1.0×	158 1.2×	16 0.4×	28 1.0×	37	391
Abhijit Davare United States	12	205 0.6×	347 1.5×	176 1.4×	102 2.3×	43 1.6×	29	523
Peeter Ellervee Estonia	10	216 0.7×	367 1.6×	227 1.8×	27 0.6×	29 1.1×	94	474
David Chinnery United States	14	606 1.9×	411 1.8×	109 0.9×	63 1.4×	29 1.1×	28	726
Minjoong Rim South Korea	14	450 1.4×	192 0.9×	331 2.6×	35 0.8×	19 0.7×	86	647
C.P. Ravikumar India	16	596 1.9×	564 2.5×	163 1.3×	25 0.6×	39 1.4×	129	757
Shih-Hsu Huang Taiwan	13	472 1.5×	305 1.4×	99 0.8×	36 0.8×	83 3.1×	134	610
Gajski United States	10	178 0.6×	390 1.7×	213 1.7×	71 1.6×	54 2.0×	13	494
B. Vinnakota United States	14	473 1.5×	308 1.4×	233 1.8×	27 0.6×	45 1.7×	54	606

Countries citing papers authored by Vidyasagar Nookala

Since Specialization

Citations

This map shows the geographic impact of Vidyasagar Nookala's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Vidyasagar Nookala with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Vidyasagar Nookala more than expected).

Fields of papers citing papers by Vidyasagar Nookala

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Vidyasagar Nookala. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Vidyasagar Nookala. The network helps show where Vidyasagar Nookala may publish in the future.

Co-authorship network of co-authors of Vidyasagar Nookala

This figure shows the co-authorship network connecting the top 25 collaborators of Vidyasagar Nookala. A scholar is included among the top collaborators of Vidyasagar Nookala based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Vidyasagar Nookala. Vidyasagar Nookala is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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9 of 9 papers shown

1.

Nookala, Vidyasagar, Ying Chen, David J. Lilja, & Sachin S. Sapatnekar. (2006). Comparing simulation techniques for microarchitecture-aware floorplanning. 80–88. 2 indexed citations

2.

Nookala, Vidyasagar, David J. Lilja, & Sachin S. Sapatnekar. (2006). Temperature-Aware Floorplanning of Microarchitecture Blocks with IPC-Power Dependence Modeling and Transient Analysis. 1 indexed citations

3.

Nookala, Vidyasagar, David J. Lilja, & Sachin S. Sapatnekar. (2006). Temperature-aware floorplanning of microarchitecture blocks with IPC-power dependence modeling and transient analysis. 298–298. 28 indexed citations

4.

Nookala, Vidyasagar, et al.. (2005). Microarchitecture-aware floorplanning using a statistical design of experiments approach. 579–579. 28 indexed citations

5.

Singh, Jaskirat, Vidyasagar Nookala, Zhi‐Quan Luo, & Sachin S. Sapatnekar. (2005). Robust gate sizing by geometric programming. 8 indexed citations

6.

Nookala, Vidyasagar & Sachin S. Sapatnekar. (2005). Designing optimized pipelined global interconnects: Algorithms and methodology impact. 19. 608–611. 18 indexed citations

7.

Singh, Jaskirat, Vidyasagar Nookala, Zhi‐Quan Luo, & Sachin S. Sapatnekar. (2005). Robust gate sizing by geometric programming. 315–315. 95 indexed citations

8.

Nookala, Vidyasagar & Sachin S. Sapatnekar. (2004). Proceedings - Design Automation Conference. Design Automation Conference. 259 indexed citations

9.

Nookala, Vidyasagar & Sachin S. Sapatnekar. (2004). A method for correcting the functionality of a wire-pipelined circuit. 570–575. 21 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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