Rahul Shrestha

718 total citations
56 papers, 492 citations indexed

About

Rahul Shrestha is a scholar working on Computer Networks and Communications, Electrical and Electronic Engineering and Signal Processing. According to data from OpenAlex, Rahul Shrestha has authored 56 papers receiving a total of 492 indexed citations (citations by other indexed papers that have themselves been cited), including 42 papers in Computer Networks and Communications, 35 papers in Electrical and Electronic Engineering and 12 papers in Signal Processing. Recurrent topics in Rahul Shrestha's work include Error Correcting Code Techniques (21 papers), Advanced Wireless Communication Techniques (21 papers) and Cognitive Radio Networks and Spectrum Sensing (18 papers). Rahul Shrestha is often cited by papers focused on Error Correcting Code Techniques (21 papers), Advanced Wireless Communication Techniques (21 papers) and Cognitive Radio Networks and Spectrum Sensing (18 papers). Rahul Shrestha collaborates with scholars based in India, Brazil and United States. Rahul Shrestha's co-authors include Roy Paily, Shubhajit Roy Chowdhury, Rainer Leupers, John L. Gustafson, Satinder K. Sharma, Dayan Guimarães and Srikant Srinivasan and has published in prestigious journals such as IEEE Transactions on Vehicular Technology, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

Rahul Shrestha

54 papers receiving 470 citations

Peers

Rahul Shrestha
F.P.S. Chin Singapore
Takeshi Ikenaga Japan
Christian Hoene Germany
Mohammed Khalid Canada
Aliazam Abbasfar Iran
Pavle Belanović Austria
Sumit J. Darak India
Ali Mahani Iran
Pekka Jääskeläinen Finland
F.P.S. Chin Singapore
Rahul Shrestha
Citations per year, relative to Rahul Shrestha Rahul Shrestha (= 1×) peers F.P.S. Chin

Countries citing papers authored by Rahul Shrestha

Since Specialization
Citations

This map shows the geographic impact of Rahul Shrestha's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Rahul Shrestha with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Rahul Shrestha more than expected).

Fields of papers citing papers by Rahul Shrestha

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Rahul Shrestha. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Rahul Shrestha. The network helps show where Rahul Shrestha may publish in the future.

Co-authorship network of co-authors of Rahul Shrestha

This figure shows the co-authorship network connecting the top 25 collaborators of Rahul Shrestha. A scholar is included among the top collaborators of Rahul Shrestha based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Rahul Shrestha. Rahul Shrestha is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Shrestha, Rahul, et al.. (2025). Energy-Preserving Indirect-Feedback for Wireless Power Transfer: Algorithm and Hardware Architecture. IEEE Transactions on Green Communications and Networking. 9(4). 1851–1865. 1 indexed citations
2.
Guimarães, Dayan, et al.. (2024). VLSI Architectures and Hardware Implementation of Ultra Low-Latency and Area-Efficient Pietra-Ricci Index Detector for Spectrum Sensing. IEEE Transactions on Circuits and Systems I Regular Papers. 71(5). 2348–2361. 2 indexed citations
3.
Shrestha, Rahul, et al.. (2024). High-Throughput and Hardware-Efficient ASIC-Chip Fabrication of Reconfigurable LDPC/Polar Decoder for mMTC and URLLC 5G-NR Applications. IEEE Transactions on Circuits and Systems I Regular Papers. 71(9). 4284–4297. 1 indexed citations
4.
Guimarães, Dayan, et al.. (2023). Resource-Efficient Low-Latency Modified Pietra-Ricci Index Detector for Spectrum Sensing in Cognitive Radio Networks. IEEE Transactions on Vehicular Technology. 72(9). 11898–11912. 7 indexed citations
5.
Shrestha, Rahul, et al.. (2023). Ultra-Low Sensing-Time and Hardware-Efficient Spectrum Sensor for Data Fusion-Based Cooperative Cognitive-Radio Network. IEEE Transactions on Consumer Electronics. 70(1). 216–226. 5 indexed citations
6.
Shrestha, Rahul, et al.. (2022). Selective register-file cache: an energy saving technique for embedded processor architecture. Design Automation for Embedded Systems. 26(2). 105–124. 1 indexed citations
7.
Shrestha, Rahul, et al.. (2022). Low Computational-Complexity SOMS-Algorithm and High-Throughput Decoder Architecture for QC-LDPC Codes. IEEE Transactions on Vehicular Technology. 72(1). 66–80. 19 indexed citations
8.
Shrestha, Rahul, et al.. (2022). An Uninterrupted Processing Technique-Based High-Throughput and Energy-Efficient Hardware Accelerator for Convolutional Neural Networks. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 30(12). 1891–1901. 6 indexed citations
9.
Shrestha, Rahul, et al.. (2022). Low-Latency and Reconfigurable VLSI-Architectures for Computing Eigenvalues and Eigenvectors Using CORDIC-Based Parallel Jacobi Method. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 30(8). 1020–1033. 5 indexed citations
10.
Shrestha, Rahul, et al.. (2021). A New Hardware-Efficient Spectrum-Sensor VLSI Architecture for Data-Fusion-Based Cooperative Cognitive-Radio Network. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 29(4). 760–773. 10 indexed citations
11.
Shrestha, Rahul, et al.. (2020). Area-Efficient and Scalable Data-Fusion Based Cooperative Spectrum Sensor for Cognitive Radio. IEEE Transactions on Circuits & Systems II Express Briefs. 68(4). 1198–1202. 13 indexed citations
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Shrestha, Rahul, et al.. (2019). Hardware-Efficient and Fast Sensing-Time Maximum-Minimum-Eigenvalue-Based Spectrum Sensor for Cognitive Radio Network. IEEE Transactions on Circuits and Systems I Regular Papers. 66(11). 4448–4461. 35 indexed citations
14.
Shrestha, Rahul, et al.. (2019). High-Throughput and High-Speed Polar-Decoder VLSI-Architecture for 5G New Radio. 329–334. 6 indexed citations
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Shrestha, Rahul, et al.. (2015). High-Throughput LDPC-Decoder Architecture Using Efficient Comparison Techniques & Dynamic Multi-Frame Processing Schedule. IEEE Transactions on Circuits and Systems I Regular Papers. 62(5). 1421–1430. 40 indexed citations
19.
Shrestha, Rahul & Roy Paily. (2015). VLSI Design and Hardware Implementation of High-Speed Energy-Efficient Logarithmic-MAP Decoder. Journal of Low Power Electronics. 11(3). 406–412. 1 indexed citations
20.
Shrestha, Rahul & Roy Paily. (2013). A novel state metric normalization technique for high-throughput maximum-a-posteriori-probability decoder. 903–907. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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