K. Uchimura

752 total citations
19 papers, 518 citations indexed

About

K. Uchimura is a scholar working on Electrical and Electronic Engineering, Artificial Intelligence and Biomedical Engineering. According to data from OpenAlex, K. Uchimura has authored 19 papers receiving a total of 518 indexed citations (citations by other indexed papers that have themselves been cited), including 16 papers in Electrical and Electronic Engineering, 10 papers in Artificial Intelligence and 7 papers in Biomedical Engineering. Recurrent topics in K. Uchimura's work include Neural Networks and Applications (10 papers), Advanced Memory and Neural Computing (8 papers) and Analog and Mixed-Signal Circuit Design (7 papers). K. Uchimura is often cited by papers focused on Neural Networks and Applications (10 papers), Advanced Memory and Neural Computing (8 papers) and Analog and Mixed-Signal Circuit Design (7 papers). K. Uchimura collaborates with scholars based in Japan. K. Uchimura's co-authors include Akira Iwata, Toshiyuki Hayashi, Y. Matsuya, Masayuki Ishikawa, T. Kobayashi, Tetsuya Kaneko, Osamu Fujita, Takashi Morie, Yoshiyuki Amemiya and Osamu Saitô and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, Computers & Electrical Engineering and IEICE Transactions on Electronics.

In The Last Decade

K. Uchimura

19 papers receiving 458 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
K. Uchimura Japan 8 447 436 80 51 37 19 518
T. Kwaśniewski Canada 11 850 1.9× 373 0.9× 51 0.6× 41 0.8× 46 1.2× 78 885
K. Azadet United States 12 480 1.1× 129 0.3× 95 1.2× 70 1.4× 28 0.8× 44 546
Y. Horiba Japan 9 376 0.8× 239 0.5× 36 0.5× 47 0.9× 24 0.6× 38 413
E.K.F. Lee United States 10 468 1.0× 413 0.9× 59 0.7× 44 0.9× 60 1.6× 17 497
M. Waltari Finland 13 722 1.6× 643 1.5× 58 0.7× 73 1.4× 75 2.0× 39 744
Patrick Loumeau France 10 391 0.9× 361 0.8× 19 0.2× 42 0.8× 16 0.4× 70 445
S. Signell Sweden 9 343 0.8× 116 0.3× 53 0.7× 89 1.7× 17 0.5× 39 410
T. Ritoniemi Finland 9 176 0.4× 167 0.4× 109 1.4× 16 0.3× 21 0.6× 26 246
Mark Vesterbacka Sweden 12 638 1.4× 528 1.2× 64 0.8× 56 1.1× 105 2.8× 103 706
Nianxiong Tan China 11 487 1.1× 405 0.9× 25 0.3× 71 1.4× 14 0.4× 52 558

Countries citing papers authored by K. Uchimura

Since Specialization
Citations

This map shows the geographic impact of K. Uchimura's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K. Uchimura with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K. Uchimura more than expected).

Fields of papers citing papers by K. Uchimura

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by K. Uchimura. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K. Uchimura. The network helps show where K. Uchimura may publish in the future.

Co-authorship network of co-authors of K. Uchimura

This figure shows the co-authorship network connecting the top 25 collaborators of K. Uchimura. A scholar is included among the top collaborators of K. Uchimura based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with K. Uchimura. K. Uchimura is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

19 of 19 papers shown
1.
Uchimura, K., et al.. (2005). VLSI- A to D and D to A converters with multi-stage noise shaping modulators. 11. 1545–1548. 5 indexed citations
2.
Uchimura, K., Osamu Saitô, & Yoshiyuki Amemiya. (2003). An 8 G connections-per-second 54 mW digital neural network chip low-power chain-reaction architecture. 134–135,. 1 indexed citations
3.
Saitô, Osamu, et al.. (2002). A 1M synapse self-learning digital neural network chip. 94–95,. 2 indexed citations
4.
Fujita, Osamu, et al.. (2002). A digital neural network LSI using sparse memory access architecture. 139–148. 1 indexed citations
5.
Fujita, Osamu, et al.. (2002). A sparse memory-access neural network engine with 96 parallel data-driven processing units. 24. 72–73,. 4 indexed citations
6.
Morie, Takashi, Osamu Fujita, & K. Uchimura. (2002). Self-learning neural network LSI with high-resolution non-volatile analog memory. 4. 1628–1632. 2 indexed citations
7.
Morie, Takashi, K. Uchimura, & Yoshihito Amemiya. (1999). Analog LSI implementation of self-learning neural networks. Computers & Electrical Engineering. 25(5). 339–355. 3 indexed citations
8.
Fujita, Osamu, et al.. (1997). A Sparse Memory Access Architecture for Digital Neural Network LSIs. IEICE Transactions on Electronics. 80(7). 996–1002. 1 indexed citations
9.
Morie, Takashi, Osamu Fujita, & K. Uchimura. (1997). Self-Learning Analog Neural Network LSI with High-Resolution Non-Volatile Analog Memory and a Partially-Serial Weight-Update Architecture. IEICE Transactions on Electronics. 80(7). 990–995. 9 indexed citations
10.
Uchimura, K., Osamu Saitô, & Yoshiyuki Amemiya. (1992). A high-speed digital neural network chip with low-power chain-reaction architecture. IEEE Journal of Solid-State Circuits. 27(12). 1862–1867. 10 indexed citations
11.
Uchimura, K.. (1992). An 8 G connections-per-second 54mW digital neural network chip with low-power chain-reaction architecture. 134–135. 2 indexed citations
12.
Matsuya, Y., K. Uchimura, Akira Iwata, & Tetsuya Kaneko. (1989). A 17 bit oversampling D-A conversion technology using multistage noise shaping. IEEE Journal of Solid-State Circuits. 24(4). 969–975. 38 indexed citations
13.
Uchimura, K., et al.. (1988). Oversampling A-to-D and D-to-A converters with multistage noise shaping modulators. IEEE Transactions on Acoustics Speech and Signal Processing. 36(12). 1899–1905. 98 indexed citations
14.
Matsuya, Y., et al.. (1987). A 16-bit oversampling A-to-D conversion technology using triple-integration noise shaping. IEEE Journal of Solid-State Circuits. 22(6). 921–929. 224 indexed citations
15.
Hayashi, Toshiyuki, et al.. (1986). A multistage delta-sigma modulator without double integration loop. 182–183. 90 indexed citations
16.
Uno, Takehiko, et al.. (1983). A Single-Chip ADM LSI CODEC. IEEE Journal of Solid-State Circuits. 18(1). 33–39. 3 indexed citations
17.
Iwata, Atsushi, et al.. (1981). Low power PCM CODEC and filter system. IEEE Journal of Solid-State Circuits. 16(2). 73–79. 4 indexed citations
18.
Iwata, Akira, et al.. (1981). A single-chip codec with switched-capacitor filters. IEEE Journal of Solid-State Circuits. 16(4). 315–321. 14 indexed citations
19.
Hattori, Shinnosuke, et al.. (1980). PCM CODEC and filter system. 178–179. 7 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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