Jin‐Fa Lin

780 total citations
32 papers, 544 citations indexed

About

Jin‐Fa Lin is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Computational Theory and Mathematics. According to data from OpenAlex, Jin‐Fa Lin has authored 32 papers receiving a total of 544 indexed citations (citations by other indexed papers that have themselves been cited), including 27 papers in Electrical and Electronic Engineering, 11 papers in Biomedical Engineering and 10 papers in Computational Theory and Mathematics. Recurrent topics in Jin‐Fa Lin's work include Low-power high-performance VLSI design (25 papers), Advancements in Semiconductor Devices and Circuit Design (12 papers) and Analog and Mixed-Signal Circuit Design (11 papers). Jin‐Fa Lin is often cited by papers focused on Low-power high-performance VLSI design (25 papers), Advancements in Semiconductor Devices and Circuit Design (12 papers) and Analog and Mixed-Signal Circuit Design (11 papers). Jin‐Fa Lin collaborates with scholars based in Taiwan and China. Jin‐Fa Lin's co-authors include Yin‐Tsung Hwang, Ming‐Hwa Sheu, Fenghua Huang, Suocheng Wei, Po‐Yu Kuo, Shih‐Chang Hsia, Yu‐Wei Chou, Kunsheng Li, Ya‐Hsin Hsueh and Chuan‐Yu Chang and has published in prestigious journals such as IEEE Access, Sensors and Electronics Letters.

In The Last Decade

Jin‐Fa Lin

29 papers receiving 475 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Jin‐Fa Lin Taiwan 10 429 233 99 81 55 32 544
S. E. D. Habib Egypt 10 240 0.6× 38 0.2× 13 0.1× 87 1.1× 83 1.5× 64 444
H. Sanchez United States 9 415 1.0× 116 0.5× 28 0.3× 24 0.3× 197 3.6× 21 504
Kaya Demir Türkiye 10 219 0.5× 59 0.3× 39 0.4× 22 0.3× 13 0.2× 29 327
Hyein Lee United States 13 364 0.8× 15 0.1× 14 0.1× 17 0.2× 178 3.2× 29 436
Kai Song China 11 125 0.3× 41 0.2× 10 0.1× 27 0.3× 13 0.2× 54 325
Jiangmin Gu Singapore 9 903 2.1× 431 1.8× 256 2.6× 16 0.2× 179 3.3× 33 956
Jianping Hu China 12 435 1.0× 157 0.7× 111 1.1× 8 0.1× 74 1.3× 132 525
Avishek Adhikary India 12 254 0.6× 275 1.2× 18 0.2× 38 0.5× 34 554
Yen‐Jen Chang Taiwan 11 151 0.4× 57 0.2× 32 0.3× 7 0.1× 139 2.5× 27 290
Debiprasad Priyabrata Acharya India 13 387 0.9× 125 0.5× 22 0.2× 2 0.0× 54 1.0× 52 469

Countries citing papers authored by Jin‐Fa Lin

Since Specialization
Citations

This map shows the geographic impact of Jin‐Fa Lin's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jin‐Fa Lin with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jin‐Fa Lin more than expected).

Fields of papers citing papers by Jin‐Fa Lin

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jin‐Fa Lin. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jin‐Fa Lin. The network helps show where Jin‐Fa Lin may publish in the future.

Co-authorship network of co-authors of Jin‐Fa Lin

This figure shows the co-authorship network connecting the top 25 collaborators of Jin‐Fa Lin. A scholar is included among the top collaborators of Jin‐Fa Lin based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jin‐Fa Lin. Jin‐Fa Lin is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Lin, Jin‐Fa, et al.. (2025). Safety Monitoring System of Stamping Presses Based on YOLOv8n Model. IEEE Access. 13. 53660–53672.
3.
Chou, Yu‐Wei, et al.. (2024). SR-Latch-Based 12T SRAM Cell Design for Low Power Application. 1–4. 1 indexed citations
4.
Sheu, Ming‐Hwa, et al.. (2021). A 0.3 V PNN Based 10T SRAM with Pulse Control Based Read-Assist and Write Data-Aware Schemes for Low Power Applications. Sensors. 21(19). 6591–6591. 4 indexed citations
5.
Lin, Jin‐Fa, et al.. (2020). Tomato Disease Detection and Classification by Deep Learning. 25–29. 83 indexed citations
6.
Lin, Jin‐Fa, et al.. (2019). Novel Low Voltage and Low Power Array Multiplier Design for IoT Applications. Electronics. 8(12). 1429–1429. 7 indexed citations
8.
Lin, Jin‐Fa, et al.. (2017). Low-Power 19-Transistor True Single-Phase Clocking Flip-Flop Design Based on Logic Structure Reduction Schemes. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25(11). 3033–3044. 50 indexed citations
9.
Lin, Jin‐Fa. (2017). Low Power Latch-adder Based Multiplier Design. JSTS Journal of Semiconductor Technology and Science. 17(6). 806–814. 3 indexed citations
10.
Lin, Jin‐Fa, et al.. (2016). Low Power SR-Latch Based Flip-Flop Design Using 21 Transistors. Journal of Low Power Electronics. 12(2). 112–116. 2 indexed citations
11.
Hwang, Yin‐Tsung, et al.. (2016). MVDR based adaptive beamformer design and its FPGA implementation for ultrasonic imaging. 143–145. 3 indexed citations
12.
Wei, Suocheng, et al.. (2015). Estrus synchronization schemes and application efficacies in anestrus lanzhou fat-tailed ewes. Journal of Applied Animal Research. 44(1). 466–473. 16 indexed citations
13.
Chu, Hung‐Chi, et al.. (2013). Novel Low Complexity Pulse-Triggered Flip-Flop for Wireless Baseband Applications. 2013. 1–4. 1 indexed citations
14.
Lin, Jin‐Fa. (2013). Low-Power Pulse-Triggered Flip-Flop Design Based on a Signal Feed-Through. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22(1). 181–185. 37 indexed citations
15.
Lin, Jin‐Fa, Yin‐Tsung Hwang, & Ming‐Hwa Sheu. (2008). Low Complexity Dual-Mode Pulse Generator Designs. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. E91-A(7). 1812–1815. 1 indexed citations
16.
Hwang, Yin‐Tsung, et al.. (2007). Low Power Multipliers Using Enhenced Row Bypassing Schemes. 136–141. 4 indexed citations
17.
Lin, Jin‐Fa, et al.. (2007). A Novel High-Speed and Energy Efficient 10-Transistor Full Adder Design. IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications. 54(5). 1050–1059. 176 indexed citations
18.
Lin, Jin‐Fa, et al.. (2006). Low Power Multiplier Designs Based on Improved Column Bypassing Schemes. 594–597. 6 indexed citations
19.
Lin, Jin‐Fa, Ming‐Hwa Sheu, & Yin‐Tsung Hwang. (2006). Low-Power and Low-Complextly Full Adder Design for Wireless Base Band Application. 49. 2337–2341. 2 indexed citations
20.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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