Citations per year, relative to Hideki Asai Hideki Asai (= 1×)
peers
Imtiaz Ahmed
Countries citing papers authored by Hideki Asai
Since
Specialization
Citations
This map shows the geographic impact of Hideki Asai's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Hideki Asai with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Hideki Asai more than expected).
This network shows the impact of papers produced by Hideki Asai. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Hideki Asai. The network helps show where Hideki Asai may publish in the future.
Co-authorship network of co-authors of Hideki Asai
This figure shows the co-authorship network connecting the top 25 collaborators of Hideki Asai.
A scholar is included among the top collaborators of Hideki Asai based on the total number of
citations received by their joint publications. Widths of edges
represent the number of papers authors have co-authored together.
Node borders
signify the number of papers an author published with Hideki Asai. Hideki Asai is excluded from
the visualization to improve readability, since they are connected to all nodes in the network.
Asai, Hideki, et al.. (2015). Triangular Subcell Method for Efficient Equivalent Circuit Modeling of Power Delivery Network. ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications. 664–665.
3.
Asai, Hideki, et al.. (2009). Equivalent Properties between Latency Insertion Method (LIM) and Semi-Implicit Numerical Integration Method. ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications. 843–844.
4.
Yoshida, Masahiro, et al.. (2003). Face Image Recognition by 2-Dimensional Discrete Walsh Transform and Multi-Layer Neural Network. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 86(10). 2623–2627.4 indexed citations
5.
Suzuki, et al.. (2002). A new CMOS 4Q–multiplier using linear and saturation regions complementally. European Solid-State Circuits Conference. 755–758.2 indexed citations
6.
Suzuki, Tsutomu, et al.. (2002). A new CMOS 4Q–multiplier using linear and saturation regions complementally. European Solid-State Circuits Conference. 755–758.2 indexed citations
7.
Ninomiya, Hiroshi, et al.. (2001). Design Method of Neural Networks for Limit Cycle Generator by Linear Programming. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 84(2). 688–692.2 indexed citations
8.
Watanabe, Takayuki & Hideki Asai. (2001). Acceleration Techniques for Synthesis and Analysis of Time-Domain Models of Interconnects Using FDTD Method. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 84(1). 367–371.
9.
Watanabe, Takayuki, et al.. (1999). Transient Analysis for Transmission Line Networks Using Expanded GMC (Special Section on Nonlinear Theory and Its Applications). IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 82(9). 1789–1795.2 indexed citations
10.
Yamamoto, Hiroyuki, et al.. (1997). A Neuro-Based Optimization Algorithm for Three Dimensional Cylindric Puzzles. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 1049–1054.2 indexed citations
11.
Watanabe, Takayuki & Hideki Asai. (1996). Acceleration Techniques for Waveform Relaxation Approaches to Coupled Lossy Transmission Lines Circuit Analysis Using GMC and GLDW Techniques (Special Section on Nonlinear Theory and its Applications). IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 79(10). 1538–1545.2 indexed citations
Ishida, Masaki, Kôichi Hayashi, Masakatsu Nishigaki, & Hideki Asai. (1994). Relaxation-Based Algorithms for Bipolar Circuit Analysis (Special Section of Papers Selected from JTC-CSCC'93). IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 77(6). 1023–1027.1 indexed citations
14.
Ninomiya, Hiroshi, et al.. (1994). Discrete Walsh Transform by Linear Programming Neural Net. International Conference on Neural Information Processing. 3(2). 809–814.2 indexed citations
15.
Kamio, Takashi, Hiroshi Ninomiya, & Hideki Asai. (1994). A Neural Net Approach to Discrete Walsh Transform (Special Section of Letters Selected from the 1994 IEICE Spring Conference). IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 77(11). 1882–1886.5 indexed citations
16.
Asai, Hideki, et al.. (1994). Efficient Simulation of Lossy Coupled Transmission Lines by the Application of Window Partitioning Technique to the Waveform Relaxation Approach. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 1742–1752.2 indexed citations
17.
Ninomiya, Hiroshi & Hideki Asai. (1993). Design and Simulation of Neural Network Digital Sequential Circuits. International Symposium on Circuits and Systems. 91–96.8 indexed citations
18.
Ishida, Masaki, et al.. (1993). Relaxation-Based Algorithms for Bipolar Circuit Analysis. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 1023–1027.1 indexed citations
19.
Tanaka, Nobuyuki & Hideki Asai. (1990). Large Scale Circuit Simulation System with Dedicated Parallel Processor SMASH. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 1957–1963.
20.
Asai, Hideki. (1988). Availability of Gate Level Node Tearing in Bipolar Circuit Simulation by Direct Method. 71(10). 962–964.2 indexed citations
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive
bibliographic database. While OpenAlex provides broad and valuable coverage of the global
research landscape, it—like all bibliographic datasets—has inherent limitations. These include
incomplete records, variations in author disambiguation, differences in journal indexing, and
delays in data updates. As a result, some metrics and network relationships displayed in
Rankless may not fully capture the entirety of a scholar's output or impact.