Harijot Singh Bindra

417 total citations
14 papers, 255 citations indexed

About

Harijot Singh Bindra is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Cellular and Molecular Neuroscience. According to data from OpenAlex, Harijot Singh Bindra has authored 14 papers receiving a total of 255 indexed citations (citations by other indexed papers that have themselves been cited), including 13 papers in Electrical and Electronic Engineering, 12 papers in Biomedical Engineering and 2 papers in Cellular and Molecular Neuroscience. Recurrent topics in Harijot Singh Bindra's work include Analog and Mixed-Signal Circuit Design (12 papers), Advancements in Semiconductor Devices and Circuit Design (6 papers) and Low-power high-performance VLSI design (5 papers). Harijot Singh Bindra is often cited by papers focused on Analog and Mixed-Signal Circuit Design (12 papers), Advancements in Semiconductor Devices and Circuit Design (6 papers) and Low-power high-performance VLSI design (5 papers). Harijot Singh Bindra collaborates with scholars based in Netherlands, India and United States. Harijot Singh Bindra's co-authors include Bram Nauta, Anne-Johan Annema, Daniël Schinkel, Simon Louwsma, Gerard J. M. Wienk, Ronan van der Zee, Pieter Harpe, Mark S. Oude Alink, Eugenio Cantatore and Ed van Tuijl and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Transactions on Circuits & Systems II Express Briefs.

In The Last Decade

Harijot Singh Bindra

11 papers receiving 245 citations

Peers

Harijot Singh Bindra

EEE

CNC

CMN

John G. Kauffman Germany

Kareem Ragab United States

Samaneh Babayan-Mashhadi Iran

Muhammed Bolatkale Netherlands

Pingli Huang United States

Hao San Japan

Daehwa Paik Japan

Yusuke Asada Japan

Eric Soenen United States

John G. Kauffman Germany

Harijot Singh Bindra

265 ×1.2

EEE

277 ×1.3

31 ×0.7

CNC

21 ×1.2

CMN

12 ×1.1

Citations per year, relative to Harijot Singh Bindra Harijot Singh Bindra (= 1×) peers John G. Kauffman

Countries citing papers authored by Harijot Singh Bindra

Since Specialization

Citations

This map shows the geographic impact of Harijot Singh Bindra's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Harijot Singh Bindra with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Harijot Singh Bindra more than expected).

Fields of papers citing papers by Harijot Singh Bindra

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Harijot Singh Bindra. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Harijot Singh Bindra. The network helps show where Harijot Singh Bindra may publish in the future.

Co-authorship network of co-authors of Harijot Singh Bindra

This figure shows the co-authorship network connecting the top 25 collaborators of Harijot Singh Bindra. A scholar is included among the top collaborators of Harijot Singh Bindra based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Harijot Singh Bindra. Harijot Singh Bindra is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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14 of 14 papers shown

Bindra, Harijot Singh, et al.. (2025). A 12.8GS/s Sub-Sampling ADC Front-End With 38GHz Input Bandwidth and >39dB SNDR for 1 to 32GHz in 22nm FDSOI. University of Twente Research Information. 76–78.

Bindra, Harijot Singh, et al.. (2025). A 0.4–0.9 V Supply Voltage-Flexible Third-Order Passive ΔΣ Modulator With Switched-Capacitor Loop Filter Achieving 71.9 dB Peak SNDR at 4 MHz Bandwidth. IEEE Transactions on Circuits and Systems I Regular Papers. 72(10). 5365–5377.

Bindra, Harijot Singh, et al.. (2024). A Programmable Filtering and Frequency Translation by Aliasing IF Receiver With Alias and Harmonic Rejection. IEEE Journal of Solid-State Circuits. 60(6). 1997–2012. 1 indexed citations

Bindra, Harijot Singh, et al.. (2023). A 14-Bit Oversampled SAR ADC With Mismatch Error Shaping and Analog Range Compensation. IEEE Transactions on Circuits & Systems II Express Briefs. 70(5). 1719–1723. 6 indexed citations

Bindra, Harijot Singh, et al.. (2022). A 174μVRMS Input Noise, 1 GS/s Comparator in 22nm FDSOI with a Dynamic-Bias Preamplifier Using Tail Charge Pump and Capacitive Neutralization Across the Latch. 2022 IEEE International Solid- State Circuits Conference (ISSCC). 1–3. 24 indexed citations

Alink, Mark S. Oude, et al.. (2021). Reconstructing Aliased Frequency Spectra by Using Multiple Sample Rates. IEEE Transactions on Circuits and Systems I Regular Papers. 69(3). 999–1012. 3 indexed citations

Bindra, Harijot Singh, et al.. (2021). Energy Efficient Startup of Crystal Oscillators Using Stepwise Charging. IEEE Journal of Solid-State Circuits. 56(8). 2427–2437. 9 indexed citations

Bindra, Harijot Singh, Anne-Johan Annema, Simon Louwsma, & Bram Nauta. (2019). A 0.2 - 8 MS/s 10b flexible SAR ADC achieving 0.35 - 2.5 fJ/conv-step and using self-quenched dynamic bias comparator. University of Twente Research Information. C74–C75. 15 indexed citations

Bindra, Harijot Singh, Anne-Johan Annema, Gerard J. M. Wienk, Bram Nauta, & Simon Louwsma. (2019). A 4MS/s 10b SAR ADC with integrated Class-A buffers in 65nm CMOS with near rail-to-rail input using a single 1.2V supply. University of Twente Research Information. 1–4. 21 indexed citations

10.

Bindra, Harijot Singh, et al.. (2018). A 1.2-V Dynamic Bias Latch-Type Comparator in 65-nm CMOS With 0.4-mV Input Noise. IEEE Journal of Solid-State Circuits. 53(7). 1902–1912. 129 indexed citations

11.

Bindra, Harijot Singh, et al.. (2017). An energy reduced sampling technique applied to a 10b 1MS/s SAR ADC. University of Twente Research Information. 235–238. 7 indexed citations

12.

Bindra, Harijot Singh, et al.. (2017). Range pre-selection sampling technique to reduce input drive energy for SAR ADCs. University of Twente Research Information. 217–220. 7 indexed citations

13.

Bindra, Harijot Singh, et al.. (2017). A 30fJ/comparison dynamic bias comparator. University of Twente Research Information. 71–74. 32 indexed citations

14.

Bindra, Harijot Singh, et al.. (2013). Clock and data recovery module in 90nm for 10Gbps serial link with −18dB channel attenuation. 2472–2475. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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