H. Savoj

1.8k total citations
17 papers, 771 citations indexed

About

H. Savoj is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computational Theory and Mathematics. According to data from OpenAlex, H. Savoj has authored 17 papers receiving a total of 771 indexed citations (citations by other indexed papers that have themselves been cited), including 12 papers in Hardware and Architecture, 10 papers in Electrical and Electronic Engineering and 8 papers in Computational Theory and Mathematics. Recurrent topics in H. Savoj's work include VLSI and Analog Circuit Testing (9 papers), Formal Methods in Verification (8 papers) and VLSI and FPGA Design Techniques (6 papers). H. Savoj is often cited by papers focused on VLSI and Analog Circuit Testing (9 papers), Formal Methods in Verification (8 papers) and VLSI and FPGA Design Techniques (6 papers). H. Savoj collaborates with scholars based in United States. H. Savoj's co-authors include Robert K. Brayton, Alberto Sangiovanni‐Vincentelli, H.J. Touati, Jonathan Greene, Scott D. Kahn, Peter W. Sprague, Binshan Lin, K.J. Singh, Cho W. Moon and Ellen Sentovich and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Journal of Chemical Information and Computer Sciences and International Conference on Computer Aided Design.

In The Last Decade

H. Savoj

16 papers receiving 715 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
H. Savoj United States	12	434	428	392	126	90	17	771
Myla Archer United States	12	265 0.6×	59 0.1×	103 0.3×	34 0.3×	232 2.6×	34	643
Jie-Hong R. Jiang Taiwan	15	371 0.9×	380 0.9×	395 1.0×	36 0.3×	120 1.3×	112	780
Anna Bernasconi Italy	12	257 0.6×	127 0.3×	237 0.6×	73 0.6×	18 0.2×	90	535
Paul Petersen United States	13	36 0.1×	351 0.8×	68 0.2×	47 0.4×	51 0.6×	24	475
M. Davio Belgium	7	128 0.3×	84 0.2×	75 0.2×	83 0.7×	19 0.2×	16	341
Yongfeng Gu United States	12	53 0.1×	189 0.4×	93 0.2×	101 0.8×	36 0.4×	30	418
Miroslav N. Velev United States	16	644 1.5×	404 0.9×	227 0.6×	19 0.2×	238 2.6×	54	784
Valentina Ciriani Italy	13	232 0.5×	160 0.4×	243 0.6×	71 0.6×	19 0.2×	78	548
E. Goldberg United States	7	315 0.7×	198 0.5×	141 0.4×	13 0.1×	151 1.7×	10	427
D.G. Saab United States	17	122 0.3×	653 1.5×	662 1.7×	28 0.2×	127 1.4×	88	858

Countries citing papers authored by H. Savoj

Since Specialization

Citations

This map shows the geographic impact of H. Savoj's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by H. Savoj with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites H. Savoj more than expected).

Fields of papers citing papers by H. Savoj

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by H. Savoj. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by H. Savoj. The network helps show where H. Savoj may publish in the future.

Co-authorship network of co-authors of H. Savoj

This figure shows the co-authorship network connecting the top 25 collaborators of H. Savoj. A scholar is included among the top collaborators of H. Savoj based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with H. Savoj. H. Savoj is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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17 of 17 papers shown

Savoj, H., Alan Mishchenko, & Robert K. Brayton. (2014). Sequential Equivalence Checking for Clock-Gated Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 33(2). 305–317. 5 indexed citations

Savoj, H., David Berthelot, Alan Mishchenko, & Robert K. Brayton. (2010). Combinational techniques for sequential equivalence checking. 145–150. 7 indexed citations

Sentovich, Ellen, K.J. Singh, Cho W. Moon, et al.. (2003). Sequential circuit design using synthesis and optimization. 328–333. 147 indexed citations

Ye, Terry Tao, et al.. (2003). Physical synthesis for ASIC datapath circuits. 3. III–365. 9 indexed citations

Berthelot, David, Samit Ray‐Chaudhuri, & H. Savoj. (2003). An efficient linear time algorithm for scan chain optimization and repartitioning. 781–787. 18 indexed citations

Murgai, Rajeev, et al.. (2003). SLIP: a software environment for system level interactive partitioning. 220. 280–283.

Savoj, H., et al.. (2003). Fast two-level logic minimizers for multi-level logic synthesis. 544–547. 2 indexed citations

Savoj, H., Robert K. Brayton, & H.J. Touati. (2002). Extracting local don't cares for network optimization. 514–517. 41 indexed citations

Touati, H.J., H. Savoj, Binshan Lin, Robert K. Brayton, & Alberto Sangiovanni‐Vincentelli. (2002). Implicit state enumeration of finite state machines using BDD's. 130–133. 145 indexed citations

10.

Savoj, H. & Robert K. Brayton. (2002). Observability relations and observability don't cares. 518–521. 13 indexed citations

11.

Touati, H.J., H. Savoj, & Robert K. Brayton. (2002). Delay optimization of combinational logic circuits by clustering and partial collapsing. 188–191. 20 indexed citations

12.

Savoj, H. & Robert K. Brayton. (2002). The use of observability and external don't cares for the simplification of multi-level networks. 38 indexed citations

13.

Ajami, Amir H., et al.. (1999). LEOPARD: a Logical Effort-based fanout OPtimizer for ARea and Delay. International Conference on Computer Aided Design. 516–519. 13 indexed citations

14.

Greene, Jonathan, et al.. (1994). Chemical Function Queries for 3D Database Search. Journal of Chemical Information and Computer Sciences. 34(6). 1297–1308. 157 indexed citations

15.

Savoj, H., Mário J. Silva, Robert K. Brayton, & Alberto Sangiovanni‐Vincentelli. (1992). Boolean matching in logic synthesis. European Design Automation Conference. 168–174. 19 indexed citations

16.

Savoj, H.. (1992). Don't cares in multi-level network optimization. 46 indexed citations

17.

Savoj, H. & Robert K. Brayton. (1990). The use of observability and external don't cares for the simplification of multi-level networks. 297–301. 91 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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