Darshika G. Perera

554 total citations
37 papers, 361 citations indexed

About

Darshika G. Perera is a scholar working on Hardware and Architecture, Artificial Intelligence and Computer Networks and Communications. According to data from OpenAlex, Darshika G. Perera has authored 37 papers receiving a total of 361 indexed citations (citations by other indexed papers that have themselves been cited), including 20 papers in Hardware and Architecture, 13 papers in Artificial Intelligence and 12 papers in Computer Networks and Communications. Recurrent topics in Darshika G. Perera's work include Embedded Systems Design Techniques (13 papers), Parallel Computing and Optimization Techniques (12 papers) and Interconnection Networks and Systems (8 papers). Darshika G. Perera is often cited by papers focused on Embedded Systems Design Techniques (13 papers), Parallel Computing and Optimization Techniques (12 papers) and Interconnection Networks and Systems (8 papers). Darshika G. Perera collaborates with scholars based in United States, Canada and India. Darshika G. Perera's co-authors include Kin Fun Li, M. Scott Trimboli, Latha Parthiban, D. Anil Kumar, M. Teja Kiran Kumar, T. P. Latchoumi, P. V. V. Kishore, E. Kiran Kumar and K. Lavanya and has published in prestigious journals such as IEEE Access, Sensors and Electronics.

In The Last Decade

Darshika G. Perera

37 papers receiving 303 citations

Peers

Darshika G. Perera

HA

EEE

AI

CNC

CVPR

Michael J. Meeuwsen United States

Jeremy Webb United States

Eric Work United States

Shih‐Lien L. Lu United States

Emil Talpes United States

Yoon-Hwa Choi South Korea

Daniel A. Connors United States

Anil Kanduri Finland

Mastooreh Salajegheh United States

Fumihiko Sano Japan

Michael J. Meeuwsen United States

Darshika G. Perera

285 ×2.1

HA

205 ×1.9

EEE

17 ×0.2

AI

285 ×3.5

CNC

29 ×0.6

CVPR

Citations per year, relative to Darshika G. Perera Darshika G. Perera (= 1×) peers Michael J. Meeuwsen

Countries citing papers authored by Darshika G. Perera

Since Specialization

Citations

This map shows the geographic impact of Darshika G. Perera's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Darshika G. Perera with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Darshika G. Perera more than expected).

Fields of papers citing papers by Darshika G. Perera

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Darshika G. Perera. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Darshika G. Perera. The network helps show where Darshika G. Perera may publish in the future.

Co-authorship network of co-authors of Darshika G. Perera

This figure shows the co-authorship network connecting the top 25 collaborators of Darshika G. Perera. A scholar is included among the top collaborators of Darshika G. Perera based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Darshika G. Perera. Darshika G. Perera is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

1.

Perera, Darshika G., et al.. (2024). HDL Code Variation: Impact on FPGA Performance Metrics and CAD Tools. 1–6. 1 indexed citations

2.

Perera, Darshika G., et al.. (2023). A Systolic Array Architecture for SVM Classifier for Machine Learning on Embedded Devices. 1–5. 1 indexed citations

3.

Perera, Darshika G., et al.. (2023). Neuromorphic Sentiment Analysis Using Spiking Neural Networks. Sensors. 23(18). 7701–7701. 8 indexed citations

4.

Perera, Darshika G., et al.. (2023). Edge Computing-based Adaptive Machine Learning Model for Dynamic IoT Environment. 7. 1–5. 1 indexed citations

5.

Parthiban, Latha, et al.. (2023). An Effective Content Based Image Retrieval System Using Deep Learning Based Inception Model. Wireless Personal Communications. 133(2). 811–829. 4 indexed citations

6.

Lavanya, K., et al.. (2023). Land Cover Classification Using Landsat 7 Data for Land Sustainability. Wireless Personal Communications. 132(1). 679–697. 1 indexed citations

7.

Perera, Darshika G., et al.. (2022). Composing Optimized Embedded Software Architectures for Physics-Based EKF-MPC Smart Sensor for Li-Ion Battery Cell Management. Sensors. 22(17). 6438–6438. 2 indexed citations

8.

Kishore, P. V. V., Darshika G. Perera, M. Teja Kiran Kumar, D. Anil Kumar, & E. Kiran Kumar. (2020). A Quad Joint Relational Feature for 3D Skeletal Action Recognition with Circular CNNs. 10. 1–5. 4 indexed citations

9.

Perera, Darshika G., et al.. (2019). Optimized hardware accelerators for data mining applications on embedded platforms: Case study principal component analysis. Microprocessors and Microsystems. 65. 79–96. 16 indexed citations

10.

Li, Kin Fun & Darshika G. Perera. (2019). A design methodology for mobile and embedded applications on FPGA-based dynamic reconfigurable hardware. International Journal of Embedded Systems. 1(1). 1–1. 4 indexed citations

11.

Perera, Darshika G., et al.. (2019). HDL Code Optimizations: Impact on Hardware Implementations and CAD Tools. 1–9. 9 indexed citations

12.

Perera, Darshika G. & Kin Fun Li. (2019). A design methodology for mobile and embedded applications on FPGA-based dynamic reconfigurable hardware. International Journal of Embedded Systems. 11(5). 661–661. 9 indexed citations

13.

Perera, Darshika G., et al.. (2019). A Fast and Secure Pipelined Barrel Processor for Safety-Critical Applications for Real-Time Operating Systems. 33. 894–904. 2 indexed citations

14.

Perera, Darshika G., et al.. (2018). Efficient embedded architectures for fast-charge model predictive controller for battery cell management in electric vehicles. EURASIP Journal on Embedded Systems. 2018(1). 12 indexed citations

15.

Perera, Darshika G., et al.. (2017). An efficient embedded multi-ported memory architecture for next-generation FPGAs. 0. 83–90. 16 indexed citations

16.

Perera, Darshika G. & Kin Fun Li. (2013). Analysis of single-chip hardware support for mobile and embedded applications. 369–376. 16 indexed citations

17.

Perera, Darshika G. & Kin Fun Li. (2011). Embedded hardware solution for principal component analysis. 730–735. 12 indexed citations

18.

Perera, Darshika G. & Kin Fun Li. (2009). Similarity Computation Using Reconfigurable Embedded Hardware. 16. 323–329. 6 indexed citations

19.

Perera, Darshika G., et al.. (2008). Hardware acceleration for similarity computations of feature vectors. Canadian Journal of Electrical and Computer Engineering. 33(1). 21–30. 12 indexed citations

20.

Perera, Darshika G. & Kin Fun Li. (2008). Parallel Computation of Similarity Measures Using an FPGA-Based Processor Array. 955–962. 17 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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