D. Radhakrishnan

1.2k total citations
58 papers, 839 citations indexed

About

D. Radhakrishnan is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Artificial Intelligence. According to data from OpenAlex, D. Radhakrishnan has authored 58 papers receiving a total of 839 indexed citations (citations by other indexed papers that have themselves been cited), including 38 papers in Electrical and Electronic Engineering, 20 papers in Hardware and Architecture and 14 papers in Artificial Intelligence. Recurrent topics in D. Radhakrishnan's work include Low-power high-performance VLSI design (29 papers), VLSI and FPGA Design Techniques (15 papers) and Cryptography and Residue Arithmetic (13 papers). D. Radhakrishnan is often cited by papers focused on Low-power high-performance VLSI design (29 papers), VLSI and FPGA Design Techniques (15 papers) and Cryptography and Residue Arithmetic (13 papers). D. Radhakrishnan collaborates with scholars based in United States, Singapore and India. D. Radhakrishnan's co-authors include K. Vijayan Asari, Sanjiv Kumar, G.K. Maki, S. Whitaker, Thambipillai Srikanthan, Sanjeev Kumar, Illah Nourbakhsh, T. S. Santhanam, Jen‐Shiun Chiang and Sreela Sasi and has published in prestigious journals such as Nano Letters, IEEE Transactions on Medical Imaging and IEEE Journal of Solid-State Circuits.

In The Last Decade

D. Radhakrishnan

51 papers receiving 730 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
D. Radhakrishnan United States 13 581 227 188 158 128 58 839
Rajeev Jain United States 16 405 0.7× 145 0.6× 213 1.1× 134 0.8× 98 0.8× 64 794
Masanori Hariyama Japan 15 358 0.6× 59 0.3× 325 1.7× 58 0.4× 207 1.6× 135 788
Abdallah K. Cherri Kuwait 14 477 0.8× 79 0.3× 40 0.2× 221 1.4× 97 0.8× 67 727
Dinesh Patil United States 16 777 1.3× 95 0.4× 157 0.8× 56 0.4× 73 0.6× 42 1.1k
P. V. Ananda Mohan India 19 551 0.9× 390 1.7× 51 0.3× 117 0.7× 89 0.7× 104 1.0k
Tetsushi Koide Japan 14 303 0.5× 52 0.2× 233 1.2× 26 0.2× 207 1.6× 153 785
A. Wu Hong Kong 12 223 0.4× 56 0.2× 79 0.4× 58 0.4× 74 0.6× 54 507
Hyuk-Jae Lee South Korea 12 158 0.3× 55 0.2× 83 0.4× 37 0.2× 175 1.4× 61 419
Ajay Dholakia United States 13 1.1k 2.0× 66 0.3× 50 0.3× 92 0.6× 29 0.2× 44 1.5k

Countries citing papers authored by D. Radhakrishnan

Since Specialization
Citations

This map shows the geographic impact of D. Radhakrishnan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by D. Radhakrishnan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites D. Radhakrishnan more than expected).

Fields of papers citing papers by D. Radhakrishnan

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by D. Radhakrishnan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by D. Radhakrishnan. The network helps show where D. Radhakrishnan may publish in the future.

Co-authorship network of co-authors of D. Radhakrishnan

This figure shows the co-authorship network connecting the top 25 collaborators of D. Radhakrishnan. A scholar is included among the top collaborators of D. Radhakrishnan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with D. Radhakrishnan. D. Radhakrishnan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
2.
Radhakrishnan, D., et al.. (2023). SHA-256 Hash Function on Intel DE10 Lite FPGA. International Journal for Research in Applied Science and Engineering Technology. 11(12). 1175–1184. 1 indexed citations
3.
Radhakrishnan, D., et al.. (2008). Delay Efficient 32‐Bit Carry‐Skip Adder. VLSI design. 2008(1). 6 indexed citations
4.
Radhakrishnan, D., et al.. (2006). Delay Optimized Redundant Binary Adders. e85 c. 514–517. 5 indexed citations
5.
Radhakrishnan, D., et al.. (2004). Shift invert coding (SINV) for low power VLSI. 190–194. 26 indexed citations
6.
Darne, Chinmay, D. Radhakrishnan, Paul van der Heide, et al.. (2004). Applications of metallic borides for gate electrodes in CMOS integrated circuits. REVIEWS ON ADVANCED MATERIALS SCIENCE. 8(2). 185–194. 17 indexed citations
7.
Radhakrishnan, D., et al.. (2004). A Low Energy Deep Sub-Micron Bus Coding Technique.. Nano Letters. 12(11). 25–30. 4 indexed citations
8.
Mathew, Jimson, D. Radhakrishnan, & Thambipillai Srikanthan. (2003). New area efficient residue-to-weighted number system converters. 2. 945–948.
9.
Radhakrishnan, D. & Illah Nourbakhsh. (2003). Topological robot localization by training a vision-based transition detector. 1. 468–473. 11 indexed citations
10.
Radhakrishnan, D., et al.. (2003). Low-Power Dynamic Scheduling in Heterogeneous Systems.. 261–267. 2 indexed citations
11.
Radhakrishnan, D., et al.. (2002). Fault-tolerance scheme for an RNS MAC: performance and cost analysis. 2. 717–720. 5 indexed citations
12.
Radhakrishnan, D., et al.. (2002). A novel 36 bit single fault tolerant multiplier using 5 bit moduli. 1. 128–130. 1 indexed citations
13.
Radhakrishnan, D.. (2000). Low power arithmetic units using pass logic. 138. 332–336 vol.1.
14.
Mathew, Jimson, D. Radhakrishnan, & Thambipillai Srikanthan. (1999). Residue-to-binary arithmetic converter for moduli set {2n -1, 2n, 2n+1, 2n+1 -1}.. 185–188. 2 indexed citations
15.
Asari, K. Vijayan, Sanjeev Kumar, & D. Radhakrishnan. (1999). Technique of distortion correction in endoscopic images using a polynomial expansion. Medical & Biological Engineering & Computing. 37(1). 8–12. 21 indexed citations
16.
Asari, K. Vijayan, Sanjiv Kumar, & D. Radhakrishnan. (1999). A new approach for nonlinear distortion correction in endoscopic images based on least squares estimation. IEEE Transactions on Medical Imaging. 18(4). 345–354. 104 indexed citations
17.
Radhakrishnan, D., et al.. (1999). A parallel approach to direct analog-to-residue conversion. Information Processing Letters. 69(5). 249–252. 3 indexed citations
18.
Sasi, Sreela & D. Radhakrishnan. (1990). Hazards in CMOS circuits. International Journal of Electronics. 68(6). 967–990. 5 indexed citations
19.
Radhakrishnan, D., et al.. (1985). Multiple Output Pass Networks: Design and Testing.. International Test Conference. 907–911. 4 indexed citations
20.
Radhakrishnan, D.. (1969). Internal Multiplicity Structure for the Chain SU(n)⊃SU(n−1)⊃…⊃SU(2). Journal of Mathematical Physics. 10(12). 2129–2131. 4 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Breakdown of academic impact, for papers by Rajeev Jain Breakdown of academic impact, for papers by Masanori Hariyama Breakdown of academic impact, for papers by Abdallah K. Cherri Breakdown of academic impact, for papers by Dinesh Patil Breakdown of academic impact, for papers by P. V. Ananda Mohan Breakdown of academic impact, for papers by Tetsushi Koide Breakdown of academic impact, for papers by A. Wu Breakdown of academic impact, for papers by Hyuk-Jae Lee Breakdown of academic impact, for papers by Ajay Dholakia
Rankless by CCL
2026