Chia Yee Ooi

568 total citations
59 papers, 376 citations indexed

About

Chia Yee Ooi is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, Chia Yee Ooi has authored 59 papers receiving a total of 376 indexed citations (citations by other indexed papers that have themselves been cited), including 42 papers in Hardware and Architecture, 35 papers in Electrical and Electronic Engineering and 23 papers in Computer Networks and Communications. Recurrent topics in Chia Yee Ooi's work include VLSI and Analog Circuit Testing (21 papers), Interconnection Networks and Systems (19 papers) and Integrated Circuits and Semiconductor Failure Analysis (17 papers). Chia Yee Ooi is often cited by papers focused on VLSI and Analog Circuit Testing (21 papers), Interconnection Networks and Systems (19 papers) and Integrated Circuits and Semiconductor Failure Analysis (17 papers). Chia Yee Ooi collaborates with scholars based in Malaysia, Japan and Italy. Chia Yee Ooi's co-authors include Mehrdad Moghbel, Muhammad Nadzir Marsono, Yuan Wen Hau, Michiko Inoue, Fawnizu Azmadi Hussin, Fakhrul Zaman Rokhani, Hideo Fujiwara, Farooq Ahmad Khanday, Furqan Zahoor and Maurizio Palesi and has published in prestigious journals such as SHILAP Revista de lepidopterología, IEEE Access and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

Chia Yee Ooi

50 papers receiving 364 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Chia Yee Ooi Malaysia	10	191	158	87	73	43	59	376
Yanhan Zeng China	12	299 1.6×	22 0.1×	22 0.3×	21 0.3×	16 0.4×	67	397
Ruhui Liu China	8	209 1.1×	54 0.3×	62 0.7×	21 0.3×	5 0.1×	20	396
Shamik Kundu United States	9	143 0.7×	87 0.6×	85 1.0×	36 0.5×		38	249
Stefan Hadjis United States	10	126 0.7×	306 1.9×	53 0.6×	200 2.7×		13	416
R. Sakthivel India	10	156 0.8×	30 0.2×	113 1.3×	48 0.7×		52	319
Michael Bucher United States	6	341 1.8×	185 1.2×	69 0.8×	131 1.8×		8	446
R. Lin United States	9	62 0.3×	51 0.3×	60 0.7×	75 1.0×	3 0.1×	27	264
Michiko Inoue Japan	14	471 2.5×	484 3.1×	58 0.7×	69 0.9×		103	622
Kundan Nepal United States	12	377 2.0×	194 1.2×	23 0.3×	22 0.3×		49	452
Shiyu Su United States	15	372 1.9×	175 1.1×	34 0.4×	60 0.8×	4 0.1×	52	493

Countries citing papers authored by Chia Yee Ooi

Since Specialization

Citations

This map shows the geographic impact of Chia Yee Ooi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chia Yee Ooi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chia Yee Ooi more than expected).

Fields of papers citing papers by Chia Yee Ooi

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Chia Yee Ooi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chia Yee Ooi. The network helps show where Chia Yee Ooi may publish in the future.

Co-authorship network of co-authors of Chia Yee Ooi

This figure shows the co-authorship network connecting the top 25 collaborators of Chia Yee Ooi. A scholar is included among the top collaborators of Chia Yee Ooi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Chia Yee Ooi. Chia Yee Ooi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Wu, Yue, et al.. (2025). A Review of Machine Learning and Deep Learning Trends in EEG-Based Epileptic Seizure Prediction. IEEE Access. 13. 159812–159842.

Ooi, Chia Yee, et al.. (2024). Low Power Integrated Circuit Design of Extreme Learning Machine using Power Gating Methodology. 31(1). 13–19. 2 indexed citations

Ooi, Chia Yee, et al.. (2024). Systematic Review of Physically Unclonable Functions on SRAMs for Secured Authentication. 1(1). 17–26.

Ooi, Chia Yee, et al.. (2023). Improving Hardware Trojan Detection Coverage by Utilizing Features at Different Abstraction Levels. Journal of Advanced Research in Applied Sciences and Engineering Technology. 32(1). 73–86.

Moghbel, Mehrdad, et al.. (2021). Use of learning approaches to predict clinical deterioration in patients based on various variables: a review of the literature. Artificial Intelligence Review. 55(2). 1055–1084. 9 indexed citations

Ooi, Chia Yee, et al.. (2021). RtFog: A Real-Time FPGA-Based Fog Node With Remote Dynamically Reconfigurable Application Plane for Fog Analytics Redeployment. IEEE Transactions on Green Communications and Networking. 6(1). 341–351. 3 indexed citations

Ooi, Chia Yee, et al.. (2020). FPGA-Assisted assertion-based verification platform.

Ooi, Chia Yee, et al.. (2019). Classification of Trojan Nets Based on SCOAP Values using Supervised Learning. 1–5. 33 indexed citations

Ooi, Chia Yee, et al.. (2019). Accelerating Extreme Learning Machine on FPGA by Hardware Implementation of Given Rotation-QRD. International Journal of Integrated Engineering. 11(7). 3 indexed citations

10.

Ooi, Chia Yee, et al.. (2018). drDRM: A PUF-Based Dynamically Reconfigurable DRM Mechanism for FPGA-Based Platform. 4727. 194–200. 2 indexed citations

11.

Ooi, Chia Yee, et al.. (2017). Ping-lock round robin arbiter. Microelectronics Journal. 63. 81–93. 9 indexed citations

12.

Ooi, Chia Yee, et al.. (2016). An integrated DFT solution for power reduction in scan test applications by low power gating scan cell. Integration. 57. 108–124. 4 indexed citations

13.

Ooi, Chia Yee, et al.. (2015). Adaptive Configurable Transactional Memory for Multi-processor FPGA Platforms. 102–102. 1 indexed citations

14.

Ooi, Chia Yee, et al.. (2014). Configurable Version Management Hardware Transactional Memory for Multi-processor Platform. Proceeding of the Electrical Engineering Computer Science and Informatics. 1(1). 236–240. 1 indexed citations

15.

Ooi, Chia Yee, et al.. (2014). rrBox: Remote dynamically reconfigurable middlebox using NetFPGA. 1. 409–413. 1 indexed citations

16.

Fujiwara, Hideo, et al.. (2008). A Nonscan Design-for-Testability Method for Register-Transfer-Level Circuits to Guarantee Linear-Depth Time Expansion Models. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 27(9). 1535–1544. 8 indexed citations

17.

Ooi, Chia Yee & Hideaki Fujiwara. (2006). A New Scan Design Technique Based on Pre-Synthesis Thru Functions. 163–168. 3 indexed citations

18.

Ooi, Chia Yee & Hideo Fujiwara. (2006). A New Scan Design Technique Based on Pre-Synthesis Thru Functions. 17. 163–168. 3 indexed citations

19.

Ooi, Chia Yee & Hideo Fujiwara. (2005). Classification of Sequential Circuits Based on τk Notation. 24. 348–353. 2 indexed citations

20.

Ooi, Chia Yee & Hideo Fujiwara. (2004). Classification of sequential circuits based on combinational test generation complexity. Distributed Computing. 103(668). 67–72. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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