T.R. Viswanathan

Reduced nonlinear distortion in circuits with correlated double sampling

Integrated continuous-time filter design - an overview

A 10 b, 20 Msample/s, 35 mW pipeline A/D converter

ANOVA-Based Approach for DAC Diagnostics

Finite gain compensation techniques for high-Q bandpass SC filters

A 10-bit 50-MS/s SAR ADC With a Monotonic Capacitor Switching Procedure

An introduction to event-triggered and self-triggered control

Millimeter-Wave Cellular Wireless Networks: Potentials and Challenges

A precise four-quadrant multiplier with subnanosecond response

GaAs switched-capacitor circuits for high-speed signal processing

Spatial prediction models for shallow landslide hazards: a comparative assessment of the efficacy of support vector machines, artificial neural networks, kernel logistic regression, and logistic model tree

Wideband Balun-LNA With Simultaneous Output Balancing, Noise-Canceling and Distortion-Canceling

Analog-to-digital converter survey and analysis

A 1.35 GS/s, 10b, 175 mW Time-Interleaved AD Converter in 0.13 ¿m CMOS

A class of analog CMOS circuits based on the square-law characteristic of an MOS transistor in saturation

Periodic Event-Triggered Control for Linear Systems

Output-Based Event-Triggered Control With Guaranteed ${\cal L}_{\infty}$-Gain and Improved and Decentralized Event-Triggering

A parasitic-insensitive area-efficient approach to realizing very large time constants in switched-capacitor circuits

Systematic comparison of hf cmos transconductors

Send-On-Delta Concept: An Event-Based Data Reporting Strategy

A 4-MHz CMOS continuous-time filter with on-chip automatic tuning

Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization

Switched-capacitor bandpass delta-sigma A/D modulation at 10.7 MHz

A 12-Bit 3 GS/s Pipeline ADC With 0.4 mm$^{2}$ and 500 mW in 40 nm Digital CMOS

High-accuracy circuits for on-chip capacitive ratio testing and sensor readout

A 10-b 20-Msample/s analog-to-digital converter

A dual-mode 700-Msamples/s 6-bit 200-Msamples/s 7-bit A/D converter in a 0.25-/spl mu/m digital CMOS process

Reduction of finite-gain effect in switched-capacitor filters

A level-crossing sampling scheme for A/D conversion

A silicon diode analogue multiplier

Switched-capacitor frequency control loop [digital transducer]

Integrated circuit testing for quality assurance in manufacturing: history, current status, and future trends

Design of linear CMOS transconductance elements

CMOS voltage to current transducers

Switched-capacitor integrator with reduced sensitivity to amplifier gain

Switched-capacitor circuits with reduced sensitivity to amplifier gain

Increasing the clock frequency of switched-capacitor filters