Alex Orailoğlu

VLSI Test Principles and Architectures: Design for Testability

Attosecond metrology: from electron capture to future signal processing

Survey of Test Vector Compression Techniques

On-Chip Communication Architectures: System on Chip Interconnect

Variable-length input huffman coding for system-on-a-chip test

Test data compression using dictionaries with selective entries and fixed-length indices

Diagnosis for scan-based BIST: reaching deep into the signatures

Reducing Test Application Time Through Test Data Mutation Encoding

Gate Level Fault Diagnosis in Scan-Based BIST

Compacting test responses for deeply embedded SoC cores

Cost-effective deterministic partitioning for rapid diagnosis in scan-based BIST

Low-power instruction bus encoding for embedded processors

Concurrent application of compaction and compression for test time and data volume reduction in scan designs